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Commit 4b049063 authored by Marc Zyngier's avatar Marc Zyngier
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dt-bindings: interrupt-controller: arm,gic-v3: Describe EPPI range support


Update the GICv3 binding to allow interrupts in the EPPI range.

Signed-off-by: default avatarMarc Zyngier <maz@kernel.org>
parent 52085d3f
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...@@ -44,12 +44,13 @@ properties: ...@@ -44,12 +44,13 @@ properties:
be at least 4. be at least 4.
The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
interrupts, 2 for interrupts in the Extended SPI range. Other values interrupts, 2 for interrupts in the Extended SPI range, 3 for the
are reserved for future use. Extended PPI range. Other values are reserved for future use.
The 2nd cell contains the interrupt number for the interrupt type. The 2nd cell contains the interrupt number for the interrupt type.
SPI interrupts are in the range [0-987]. PPI interrupts are in the SPI interrupts are in the range [0-987]. PPI interrupts are in the
range [0-15]. Extented SPI interrupts are in the range [0-1023]. range [0-15]. Extented SPI interrupts are in the range [0-1023].
Extended PPI interrupts are in the range [0-127].
The 3rd cell is the flags, encoded as follows: The 3rd cell is the flags, encoded as follows:
bits[3:0] trigger type and level flags. bits[3:0] trigger type and level flags.
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