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Commit 59d711e9 authored by Andrew Bresticker's avatar Andrew Bresticker Committed by Tomasz Figa
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ARM: dts: exynos5420: add input clocks to audss clock controller


Specify the remaining input clocks (pll_ref, pll_in, and sclk_pcm_in)
for the AudioSS clock controller.

Signed-off-by: default avatarAndrew Bresticker <abrestic@chromium.org>
Acked-by: default avatarMike Turquette <mturquette@linaro.org>
Acked-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Signed-off-by: default avatarTomasz Figa <t.figa@samsung.com>
parent 3538a2cf
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