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Commit d7d0098d authored by George Lander's avatar George Lander Committed by Frieder Schrempf
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ASoC: sun4i-spdif: Add clock multiplier settings


[ Upstream commit 0a2319308de88b9e819c0b43d0fccd857123eb31 ]

There have been intermittent issues with the SPDIF output on H3
and H2+ devices which has been fixed by setting the s_clk to 4
times the audio pll.
Add a quirk for the clock multiplier as not every supported SoC
requires it. Without the multiplier, the audio at normal sampling
rates was distorted and did not play at higher sampling rates.

Fixes: 1bd92af8 ("ASoC: sun4i-spdif: Add support for the H3 SoC")
Signed-off-by: default avatarGeorge Lander <lander@jagmn.com>
Signed-off-by: default avatarMarcus Cooper <codekipper@gmail.com>
Link: https://patch.msgid.link/20241111165600.57219-2-codekipper@gmail.com


Signed-off-by: default avatarMark Brown <broonie@kernel.org>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent fa299df7
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1 merge request!191🤖 Sync Bot: Update v6.1-ktn to Latest Stable Kernel (v6.1.129)
...@@ -177,6 +177,7 @@ struct sun4i_spdif_quirks { ...@@ -177,6 +177,7 @@ struct sun4i_spdif_quirks {
unsigned int reg_dac_txdata; unsigned int reg_dac_txdata;
bool has_reset; bool has_reset;
unsigned int val_fctl_ftx; unsigned int val_fctl_ftx;
unsigned int mclk_multiplier;
}; };
struct sun4i_spdif_dev { struct sun4i_spdif_dev {
...@@ -314,6 +315,7 @@ static int sun4i_spdif_hw_params(struct snd_pcm_substream *substream, ...@@ -314,6 +315,7 @@ static int sun4i_spdif_hw_params(struct snd_pcm_substream *substream,
default: default:
return -EINVAL; return -EINVAL;
} }
mclk *= host->quirks->mclk_multiplier;
ret = clk_set_rate(host->spdif_clk, mclk); ret = clk_set_rate(host->spdif_clk, mclk);
if (ret < 0) { if (ret < 0) {
...@@ -348,6 +350,7 @@ static int sun4i_spdif_hw_params(struct snd_pcm_substream *substream, ...@@ -348,6 +350,7 @@ static int sun4i_spdif_hw_params(struct snd_pcm_substream *substream,
default: default:
return -EINVAL; return -EINVAL;
} }
mclk_div *= host->quirks->mclk_multiplier;
reg_val = 0; reg_val = 0;
reg_val |= SUN4I_SPDIF_TXCFG_ASS; reg_val |= SUN4I_SPDIF_TXCFG_ASS;
...@@ -541,24 +544,28 @@ static struct snd_soc_dai_driver sun4i_spdif_dai = { ...@@ -541,24 +544,28 @@ static struct snd_soc_dai_driver sun4i_spdif_dai = {
static const struct sun4i_spdif_quirks sun4i_a10_spdif_quirks = { static const struct sun4i_spdif_quirks sun4i_a10_spdif_quirks = {
.reg_dac_txdata = SUN4I_SPDIF_TXFIFO, .reg_dac_txdata = SUN4I_SPDIF_TXFIFO,
.val_fctl_ftx = SUN4I_SPDIF_FCTL_FTX, .val_fctl_ftx = SUN4I_SPDIF_FCTL_FTX,
.mclk_multiplier = 1,
}; };
static const struct sun4i_spdif_quirks sun6i_a31_spdif_quirks = { static const struct sun4i_spdif_quirks sun6i_a31_spdif_quirks = {
.reg_dac_txdata = SUN4I_SPDIF_TXFIFO, .reg_dac_txdata = SUN4I_SPDIF_TXFIFO,
.val_fctl_ftx = SUN4I_SPDIF_FCTL_FTX, .val_fctl_ftx = SUN4I_SPDIF_FCTL_FTX,
.has_reset = true, .has_reset = true,
.mclk_multiplier = 1,
}; };
static const struct sun4i_spdif_quirks sun8i_h3_spdif_quirks = { static const struct sun4i_spdif_quirks sun8i_h3_spdif_quirks = {
.reg_dac_txdata = SUN8I_SPDIF_TXFIFO, .reg_dac_txdata = SUN8I_SPDIF_TXFIFO,
.val_fctl_ftx = SUN4I_SPDIF_FCTL_FTX, .val_fctl_ftx = SUN4I_SPDIF_FCTL_FTX,
.has_reset = true, .has_reset = true,
.mclk_multiplier = 4,
}; };
static const struct sun4i_spdif_quirks sun50i_h6_spdif_quirks = { static const struct sun4i_spdif_quirks sun50i_h6_spdif_quirks = {
.reg_dac_txdata = SUN8I_SPDIF_TXFIFO, .reg_dac_txdata = SUN8I_SPDIF_TXFIFO,
.val_fctl_ftx = SUN50I_H6_SPDIF_FCTL_FTX, .val_fctl_ftx = SUN50I_H6_SPDIF_FCTL_FTX,
.has_reset = true, .has_reset = true,
.mclk_multiplier = 1,
}; };
static const struct of_device_id sun4i_spdif_of_match[] = { static const struct of_device_id sun4i_spdif_of_match[] = {
......
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