- Oct 10, 2014
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Steve Capper authored
Activate the RCU fast_gup for ARM64. We also need to force THP splits to broadcast an IPI s.t. we block in the fast_gup page walker. As THP splits are comparatively rare, this should not lead to a noticeable performance degradation. Some pre-requisite functions pud_write and pud_page are also added. [akpm@linux-foundation.org: coding-style fixes] Signed-off-by:
Steve Capper <steve.capper@linaro.org> Tested-by:
Dann Frazier <dann.frazier@canonical.com> Acked-by:
Catalin Marinas <catalin.marinas@arm.com> Cc: Hugh Dickins <hughd@google.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mel Gorman <mel@csn.ul.ie> Cc: Will Deacon <will.deacon@arm.com> Cc: Christoffer Dall <christoffer.dall@linaro.org> Cc: Andrea Arcangeli <aarcange@redhat.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Steve Capper authored
In order to implement fast_get_user_pages we need to ensure that the page table walker is protected from page table pages being freed from under it. This patch enables HAVE_RCU_TABLE_FREE, any page table pages belonging to address spaces with multiple users will be call_rcu_sched freed. Meaning that disabling interrupts will block the free and protect the fast gup page walker. Signed-off-by:
Steve Capper <steve.capper@linaro.org> Tested-by:
Dann Frazier <dann.frazier@canonical.com> Acked-by:
Catalin Marinas <catalin.marinas@arm.com> Cc: Hugh Dickins <hughd@google.com> Cc: Russell King <rmk@arm.linux.org.uk> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mel Gorman <mel@csn.ul.ie> Cc: Will Deacon <will.deacon@arm.com> Cc: Christoffer Dall <christoffer.dall@linaro.org> Cc: Andrea Arcangeli <aarcange@redhat.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Laura Abbott authored
Neither CMA nor noncoherent allocations support atomic allocations. Add a dedicated atomic pool to support this. Reviewed-by:
Catalin Marinas <catalin.marinas@arm.com> Signed-off-by:
Laura Abbott <lauraa@codeaurora.org> Cc: Arnd Bergmann <arnd@arndb.de> Cc: David Riley <davidriley@chromium.org> Cc: Olof Johansson <olof@lixom.net> Cc: Ritesh Harjain <ritesh.harjani@gmail.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Oct 02, 2014
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Radha Mohan Chintakuntla authored
This introduces ARCH_THUNDER to enable soc specific drivers and dtb files. Signed-off-by:
Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Signed-off-by:
Robert Richter <rrichter@cavium.com> Signed-off-by:
Arnd Bergmann <arnd@arndb.de>
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- Sep 22, 2014
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Catalin Marinas authored
This reverts commit 668ebd10. ... because of lots of warnings during boot if Linux isn't started as an EFI application: WARNING: CPU: 4 PID: 1 at /work/Linux/linux-2.6-aarch64/drivers/firmware/dmi_scan.c:591 dmi_matches+0x10c/0x110() dmi check: not initialized yet. Modules linked in: CPU: 4 PID: 1 Comm: swapper/0 Not tainted 3.17.0-rc4+ #606 Call trace: [<ffffffc000087fb0>] dump_backtrace+0x0/0x124 [<ffffffc0000880e4>] show_stack+0x10/0x1c [<ffffffc0004d58f8>] dump_stack+0x74/0xb8 [<ffffffc0000ab640>] warn_slowpath_common+0x8c/0xb4 [<ffffffc0000ab6b4>] warn_slowpath_fmt+0x4c/0x58 [<ffffffc0003f2d7c>] dmi_matches+0x108/0x110 [<ffffffc0003f2da8>] dmi_check_system+0x24/0x68 [<ffffffc0006974c4>] atkbd_init+0x10/0x34 [<ffffffc0000814ac>] do_one_initcall+0x88/0x1a0 [<ffffffc00067aab4>] kernel_init_freeable+0x148/0x1e8 [<ffffffc0004d2c64>] kernel_init+0x10/0xd4 Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Yi Li authored
SMBIOS is important for server hardware vendors. It implements a spec for providing descriptive information about the platform. Things like serial numbers, physical layout of the ports, build configuration data, and the like. This has been tested by dmidecode and lshw tools. This patch adds the call to dmi_scan_machine() to arm64_enter_virtual_mode(), as that is the point where the EFI Configuration Tables are registered as being available. It needs to be in an early_initcall anyway as dmi_id_init(), which is an arch_initcall itself, depends on dmi_scan_machine() having been called already. Signed-off-by:
Yi Li <yi.li@linaro.org> Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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- Sep 08, 2014
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Robert Richter authored
Raising the current maximum limit to 64. This is needed for Cavium's Thunder systems that will have at least 48 cores per die. The change keeps the current memory footprint in cpu mask structures. It does not break existing code. Setting the maximum to 64 cpus still boots systems with less cpus. Mark's Juno happily booted with a NR_CPUS=64 kernel. Tested on our Thunder system with 48 cores. We could see interrupts to all cores. Cc: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Cc: Mark Rutland <mark.rutland@arm.com> Acked-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Robert Richter <rrichter@cavium.com> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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Zi Shen Lim authored
The JIT compiler emits A64 instructions. It supports eBPF only. Legacy BPF is supported thanks to conversion by BPF core. JIT is enabled in the same way as for other architectures: echo 1 > /proc/sys/net/core/bpf_jit_enable Or for additional compiler output: echo 2 > /proc/sys/net/core/bpf_jit_enable See Documentation/networking/filter.txt for more information. The implementation passes all 57 tests in lib/test_bpf.c on ARMv8 Foundation Model :) Also tested by Will on Juno platform. Signed-off-by:
Zi Shen Lim <zlim.lnx@gmail.com> Acked-by:
Alexei Starovoitov <ast@plumgrid.com> Acked-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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- Sep 03, 2014
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Marc Zyngier authored
In order to limit code duplication, convert the architecture specific handle_IRQ to use the generic __handle_domain_irq function. Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com> Acked-by:
Catalin Marinas <catalin.marinas@arm.com> Link: https://lkml.kernel.org/r/1409047421-27649-3-git-send-email-marc.zyngier@arm.com Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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- Aug 08, 2014
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Laura Abbott authored
Rather than have architectures #define ARCH_HAS_SG_CHAIN in an architecture specific scatterlist.h, make it a proper Kconfig option and use that instead. At same time, remove the header files are are now mostly useless and just include asm-generic/scatterlist.h. [sfr@canb.auug.org.au: powerpc files now need asm/dma.h] Signed-off-by:
Laura Abbott <lauraa@codeaurora.org> Acked-by: Thomas Gleixner <tglx@linutronix.de> [x86] Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> [powerpc] Acked-by:
Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Tony Luck <tony.luck@intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com> Cc: Paul Mackerras <paulus@samba.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: "James E.J. Bottomley" <JBottomley@parallels.com> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Signed-off-by:
Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Jul 31, 2014
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Will Deacon authored
This reverts commit a28e3f4b. Ard and Yi Li report that this patch is broken by design, so revert it and let them sort it out for 3.18 instead. Reported-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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- Jul 23, 2014
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Catalin Marinas authored
This patch allows support for 3 levels of page tables with 64KB page configuration allowing 48-bit VA space. The pgd is no longer a full PAGE_SIZE (PTRS_PER_PGD is 64) and (swapper|idmap)_pg_dir are not fully populated (pgd_alloc falls back to kzalloc). Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com> Tested-by:
Jungseok Lee <jungseoklee85@gmail.com>
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Catalin Marinas authored
Rather than having several Kconfig options, define int ARM64_PGTABLE_LEVELS which will be also useful in converting some of the pgtable macros. Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com> Tested-by:
Jungseok Lee <jungseoklee85@gmail.com>
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Jungseok Lee authored
This patch implements 4 levels of translation tables since 3 levels of page tables with 4KB pages cannot support 40-bit physical address space described in [1] due to the following issue. It is a restriction that kernel logical memory map with 4KB + 3 levels (0xffffffc000000000-0xffffffffffffffff) cannot cover RAM region from 544GB to 1024GB in [1]. Specifically, ARM64 kernel fails to create mapping for this region in map_mem function since __phys_to_virt for this region reaches to address overflow. If SoC design follows the document, [1], over 32GB RAM would be placed from 544GB. Even 64GB system is supposed to use the region from 544GB to 576GB for only 32GB RAM. Naturally, it would reach to enable 4 levels of page tables to avoid hacking __virt_to_phys and __phys_to_virt. However, it is recommended 4 levels of page table should be only enabled if memory map is too sparse or there is about 512GB RAM. References ---------- [1]: Principles of ARM Memory Maps, White Paper, Issue C Signed-off-by:
Jungseok Lee <jays.lee@samsung.com> Reviewed-by:
Sungjinn Chung <sungjinn.chung@samsung.com> Acked-by:
Kukjin Kim <kgene.kim@samsung.com> Reviewed-by:
Christoffer Dall <christoffer.dall@linaro.org> Reviewed-by:
Steve Capper <steve.capper@linaro.org> [catalin.marinas@arm.com: MEMBLOCK_INITIAL_LIMIT removed, same as PUD_SIZE] [catalin.marinas@arm.com: early_ioremap_init() updated for 4 levels] [catalin.marinas@arm.com: 48-bit VA depends on BROKEN until KVM is fixed] Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com> Tested-by:
Jungseok Lee <jungseoklee85@gmail.com>
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Jungseok Lee authored
This patch adds virtual address space size and a level of translation tables to kernel configuration. It facilicates introduction of different MMU options, such as 4KB + 4 levels, 16KB + 4 levels and 64KB + 3 levels, easily. The idea is based on the discussion with Catalin Marinas: http://www.spinics.net/linux/lists/arm-kernel/msg319552.html Signed-off-by:
Jungseok Lee <jays.lee@samsung.com> Reviewed-by:
Sungjinn Chung <sungjinn.chung@samsung.com> Acked-by:
Kukjin Kim <kgene.kim@samsung.com> Reviewed-by:
Christoffer Dall <christoffer.dall@linaro.org> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com> Tested-by:
Jungseok Lee <jungseoklee85@gmail.com>
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Mark Brown authored
A reference to ARCH_HAS_OPP was added in commit 333d17e5 (arm64: add ARCH_HAS_OPP to allow enabling OPP library) however this symbol is no longer needed after commit 049d595a (PM / OPP: Make OPP invisible to users in Kconfig). Signed-off-by:
Mark Brown <broonie@linaro.org> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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- Jul 21, 2014
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Yi Li authored
SMbios is important for server hardware vendors. It implements a spec for providing descriptive information about the platform. Things like serial numbers, physical layout of the ports, build configuration data, and the like. This has been tested by dmidecode and lshw tools. Signed-off-by:
Yi Li <yi.li@linaro.org> Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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- Jul 18, 2014
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Ard Biesheuvel authored
This patch changes both x86 and arm64 efistub implementations from #including shared .c files under drivers/firmware/efi to building shared code as a static library. The x86 code uses a stub built into the boot executable which uncompresses the kernel at boot time. In this case, the library is linked into the decompressor. In the arm64 case, the stub is part of the kernel proper so the library is linked into the kernel proper as well. Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by:
Matt Fleming <matt.fleming@intel.com>
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- Jul 16, 2014
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Peter Zijlstra authored
The optimistic spin code assumes regular stores and cmpxchg() play nice; this is found to not be true for at least: parisc, sparc32, tile32, metag-lock1, arc-!llsc and hexagon. There is further wreckage, but this in particular seemed easy to trigger, so blacklist this. Opt in for known good archs. Signed-off-by:
Peter Zijlstra <peterz@infradead.org> Reported-by:
Mikulas Patocka <mpatocka@redhat.com> Cc: David Miller <davem@davemloft.net> Cc: Chris Metcalf <cmetcalf@tilera.com> Cc: James Bottomley <James.Bottomley@hansenpartnership.com> Cc: Vineet Gupta <vgupta@synopsys.com> Cc: Jason Low <jason.low2@hp.com> Cc: Waiman Long <waiman.long@hp.com> Cc: "James E.J. Bottomley" <jejb@parisc-linux.org> Cc: Paul McKenney <paulmck@linux.vnet.ibm.com> Cc: John David Anglin <dave.anglin@bell.net> Cc: James Hogan <james.hogan@imgtec.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Davidlohr Bueso <davidlohr@hp.com> Cc: stable@vger.kernel.org Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Russell King <linux@arm.linux.org.uk> Cc: Will Deacon <will.deacon@arm.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linuxppc-dev@lists.ozlabs.org Cc: sparclinux@vger.kernel.org Link: http://lkml.kernel.org/r/20140606175316.GV13930@laptop.programming.kicks-ass.net Signed-off-by:
Ingo Molnar <mingo@kernel.org>
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- Jul 10, 2014
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AKASHI Takahiro authored
On AArch64, audit is supported through generic lib/audit.c and compat_audit.c, and so this patch adds arch specific definitions required. Acked-by Will Deacon <will.deacon@arm.com> Acked-by:
Richard Guy Briggs <rgb@redhat.com> Signed-off-by:
AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Larry Bassel authored
Make calls to ct_user_enter when the kernel is exited and ct_user_exit when the kernel is entered (in el0_da, el0_ia, el0_svc, el0_irq and all of the "error" paths). These macros expand to function calls which will only work properly if el0_sync and related code has been rearranged (in a previous patch of this series). The calls to ct_user_exit are made after hw debugging has been enabled (enable_dbg_and_irq). The call to ct_user_enter is made at the beginning of the kernel_exit macro. This patch is based on earlier work by Kevin Hilman. Save/restore optimizations were also done by Kevin. Acked-by:
Will Deacon <will.deacon@arm.com> Reviewed-by:
Kevin Hilman <khilman@linaro.org> Tested-by:
Kevin Hilman <khilman@linaro.org> Signed-off-by:
Larry Bassel <larry.bassel@linaro.org> Signed-off-by:
Kevin Hilman <khilman@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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- Jul 09, 2014
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Laura Abbott authored
arm64 currently lacks support for -fstack-protector. Add similar functionality to arm to detect stack corruption. Acked-by:
Will Deacon <will.deacon@arm.com> Acked-by:
Kees Cook <keescook@chromium.org> Signed-off-by:
Laura Abbott <lauraa@codeaurora.org> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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- Jul 08, 2014
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Marc Zyngier authored
The Generic Interrupt Controller (version 3) offers services that are similar to GICv2, with a number of additional features: - Affinity routing based on the CPU MPIDR (ARE) - System register for the CPU interfaces (SRE) - Support for more that 8 CPUs - Locality-specific Peripheral Interrupts (LPIs) - Interrupt Translation Services (ITS) This patch adds preliminary support for GICv3 with ARE and SRE, non-secure mode only. It relies on higher exception levels to grant ARE and SRE access. Support for LPI and ITS will be added at a later time. Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Reviewed-by:
Zi Shen Lim <zlim@broadcom.com> Reviewed-by:
Christoffer Dall <christoffer.dall@linaro.org> Reviewed-by:
Tirumalesh Chalamarla <tchalamarla@cavium.com> Reviewed-by:
Yun Wu <wuyun.wu@huawei.com> Reviewed-by:
Zhen Lei <thunder.leizhen@huawei.com> Tested-by:
Tirumalesh <Chalamarla<tchalamarla@cavium.com> Tested-by:
Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Acked-by:
Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Acked-by:
Catalin Marinas <catalin.marinas@arm.com> Signed-off-by:
Marc Zyngier <marc.zyngier@arm.com> Reviewed-by:
Mark Rutland <mark.rutland@arm.com> Link: https://lkml.kernel.org/r/1404140510-5382-3-git-send-email-marc.zyngier@arm.com Signed-off-by:
Jason Cooper <jason@lakedaemon.net>
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- Jul 07, 2014
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Ard Biesheuvel authored
According to the UEFI spec section 2.3.6.4, the use of FP/SIMD instructions is allowed, and should adhere to the AAPCS64 calling convention, which states that 'only the bottom 64 bits of each value stored in registers v8-v15 need to be preserved' (section 5.1.2). This applies equally to UEFI Runtime Services called by the kernel, so make sure the FP/SIMD register file is preserved in this case. We do this by enabling the wrappers for UEFI Runtime Services (CONFIG_EFI_RUNTIME_WRAPPERS) and inserting calls to kernel_neon_begin()and kernel_neon_end() into these wrappers. Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by:
Catalin Marinas <catalin.marinas@arm.com> Signed-off-by:
Matt Fleming <matt.fleming@intel.com>
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- Jun 18, 2014
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Sudeep Holla authored
The Operating Performance Point (OPP) Layer library is a generic library used by CPUFREQ and DEVFREQ. It can be enabled only on the platforms that specify ARCH_HAS_OPP option. This patch selects that option in order to allow ARM64 based platforms to use OPP library. Signed-off-by:
Sudeep Holla <sudeep.holla@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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Sudeep Holla authored
Signed-off-by:
Sudeep Holla <sudeep.holla@arm.com> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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- May 29, 2014
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AKASHI Takahiro authored
This patch allows system call entry or exit to be traced as ftrace events, ie. sys_enter_*/sys_exit_*, if CONFIG_FTRACE_SYSCALLS is enabled. Those events appear and can be controlled under ${sysfs}/tracing/events/syscalls/ Please note that we can't trace compat system calls here because AArch32 mode does not share the same syscall table with AArch64. Just define ARCH_TRACE_IGNORE_COMPAT_SYSCALLS in order to avoid unexpected results (bogus syscalls reported or even hang-up). Acked-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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AKASHI Takahiro authored
This patch allows "dynamic ftrace" if CONFIG_DYNAMIC_FTRACE is enabled. Here we can turn on and off tracing dynamically per-function base. On arm64, this is done by patching single branch instruction to _mcount() inserted by gcc -pg option. The branch is replaced to NOP initially at kernel start up, and later on, NOP to branch to ftrace_caller() when enabled or branch to NOP when disabled. Please note that ftrace_caller() is a counterpart of _mcount() in case of 'static' ftrace. More details on architecture specific requirements are described in Documentation/trace/ftrace-design.txt. Acked-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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AKASHI Takahiro authored
This patch implements arm64 specific part to support function tracers, such as function (CONFIG_FUNCTION_TRACER), function_graph (CONFIG_FUNCTION_GRAPH_TRACER) and function profiler (CONFIG_FUNCTION_PROFILER). With 'function' tracer, all the functions in the kernel are traced with timestamps in ${sysfs}/tracing/trace. If function_graph tracer is specified, call graph is generated. The kernel must be compiled with -pg option so that _mcount() is inserted at the beginning of functions. This function is called on every function's entry as long as tracing is enabled. In addition, function_graph tracer also needs to be able to probe function's exit. ftrace_graph_caller() & return_to_handler do this by faking link register's value to intercept function's return path. More details on architecture specific requirements are described in Documentation/trace/ftrace-design.txt. Reviewed-by:
Ganapatrao Kulkarni <ganapatrao.kulkarni@cavium.com> Acked-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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AKASHI Takahiro authored
Recordmcount utility under scripts is run, after compiling each object, to find out all the locations of calling _mcount() and put them into specific seciton named __mcount_loc. Then linker collects all such information into a table in the kernel image (between __start_mcount_loc and __stop_mcount_loc) for later use by ftrace. This patch adds arm64 specific definitions to identify such locations. There are two types of implementation, C and Perl. On arm64, only C version is used to build the kernel now that CONFIG_HAVE_C_RECORDMCOUNT is on. But Perl version is also maintained. This patch also contains a workaround just in case where a header file, elf.h, on host machine doesn't have definitions of EM_AARCH64 nor R_AARCH64_ABS64. Without them, compiling C version of recordmcount will fail. Acked-by:
Will Deacon <will.deacon@arm.com> Signed-off-by:
AKASHI Takahiro <takahiro.akashi@linaro.org> Signed-off-by:
Will Deacon <will.deacon@arm.com>
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- May 14, 2014
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Ard Biesheuvel authored
This patch adds support for the SHA-1 Secure Hash Algorithm for CPUs that have support for the SHA-1 part of the ARM v8 Crypto Extensions. Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Acked-by:
Herbert Xu <herbert@gondor.apana.org.au>
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- May 09, 2014
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Catalin Marinas authored
The hardware provides the maximum cache line size in the system via the CTR_EL0.CWG bits. This patch implements the cache_line_size() function to read such information, together with a sanity check if the statically defined L1_CACHE_BYTES is smaller than the hardware value. Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com> Acked-by:
Will Deacon <will.deacon@arm.com>
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- Apr 30, 2014
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Mark Salter authored
This patch adds PE/COFF header fields to the start of the kernel Image so that it appears as an EFI application to UEFI firmware. An EFI stub is included to allow direct booting of the kernel Image. Signed-off-by:
Mark Salter <msalter@redhat.com> [Add support in PE/COFF header for signed images] Signed-off-by:
Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by:
Leif Lindholm <leif.lindholm@linaro.org> Acked-by:
Catalin Marinas <catalin.marinas@arm.com> Signed-off-by:
Matt Fleming <matt.fleming@intel.com>
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Mark Salter authored
This patch adds EFI runtime support for arm64. This runtime support allows the kernel to access various EFI runtime services provided by EFI firmware. Things like reboot, real time clock, EFI boot variables, and others. This functionality is supported for little endian kernels only. The UEFI firmware standard specifies that the firmware be little endian. A future patch is expected to add support for big endian kernels running with little endian firmware. Signed-off-by:
Mark Salter <msalter@redhat.com> [ Remove unnecessary cache/tlb maintenance. ] Signed-off-by:
Mark Rutland <mark.rutland@arm.com> Signed-off-by:
Leif Lindholm <leif.lindholm@linaro.org> Signed-off-by:
Matt Fleming <matt.fleming@intel.com>
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- Apr 24, 2014
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Rob Herring authored
In order to support earlycon on arm64, we need to enable earlycon fixmap support. Signed-off-by:
Rob Herring <robh@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Signed-off-by:
Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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- Apr 22, 2014
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Hanjun Guo authored
There is a duplicated Kconfig entry for "kernel/power/Kconfig" in menu "Power management options" and "CPU Power Management", remove the one from menu "CPU Power Management" suggested by Viresh. Signed-off-by:
Hanjun Guo <hanjun.guo@linaro.org> Reviewed-by:
Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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- Apr 07, 2014
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Mark Salter authored
Add support for early IO or memory mappings which are needed before the normal ioremap() is usable. This also adds fixmap support for permanent fixed mappings such as that used by the earlyprintk device register region. Signed-off-by:
Mark Salter <msalter@redhat.com> Acked-by:
Catalin Marinas <catalin.marinas@arm.com> Cc: Borislav Petkov <borislav.petkov@amd.com> Cc: Dave Young <dyoung@redhat.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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Uwe Kleine-König authored
If the renamed symbol is defined lib/iomap.c implements ioport_map and ioport_unmap and currently (nearly) all platforms define the port accessor functions outb/inb and friend unconditionally. So HAS_IOPORT_MAP is the better name for this. Consequently NO_IOPORT is renamed to NO_IOPORT_MAP. The motivation for this change is to reintroduce a symbol HAS_IOPORT that signals if outb/int et al are available. I will address that at least one merge window later though to keep surprises to a minimum and catch new introductions of (HAS|NO)_IOPORT. The changes in this commit were done using: $ git grep -l -E '(NO|HAS)_IOPORT' | xargs perl -p -i -e 's/\b((?:CONFIG_)?(?:NO|HAS)_IOPORT)\b/$1_MAP/' Signed-off-by:
Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-by:
Arnd Bergmann <arnd@arndb.de> Signed-off-by:
Andrew Morton <akpm@linux-foundation.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Apr 02, 2014
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Josh Boyer authored
Commit 74397174 attempted to clean up the power management options for arm64, but when things were merged it didn't fully take effect. Fix it again. Signed-off-by:
Josh Boyer <jwboyer@fedoraproject.org> Signed-off-by:
Linus Torvalds <torvalds@linux-foundation.org>
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- Mar 19, 2014
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Mark Brown authored
Probably due to rebasing over the lengthy time it took to get the patch merged commit addea9ef (cpufreq: enable ARM drivers on arm64) added a duplicate Power management options section. Add CPUfreq to the CPU power management section and remove a duplicate include of the main power section. Signed-off-by:
Mark Brown <broonie@linaro.org> Signed-off-by:
Catalin Marinas <catalin.marinas@arm.com>
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