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Alexander Arndt
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Andreas Findeklee afindeklee
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Annette Kobou akobou
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Armin Mück amueck
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Daniel Ehrler dehrler
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Devran Ölcer doelcer
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Dieter Scheufele dscheufele
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Dietmar Kolbus dkolbus
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Dominik Wurster Wurster
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Eberhard Stoll estoll
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Florian Mayer fmayer
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Frieder Schrempf
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Julian Bauknecht jbauknecht
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Jó Bitsch jbitsch
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Jürgen Kling
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Klemenz Christof kchristof
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Lukas Loosli lloosli
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Marc Gonser mgonser
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Markus Abegg mabegg
- Dec 10, 2023
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Peter Griffin authored
Add the "google,gs101-pinctrl" compatible to the dt-schema bindings documentation. Reviewed-by:
Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by:
Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20231209233106.147416-7-peter.griffin@linaro.org Signed-off-by:
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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- Nov 24, 2023
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Krzysztof Kozlowski authored
Older ARM8 SoCs like Exynos5433, Exynos7 and Exynos7885 have the pin controller with wake-up interrupts muxed, thus the wake-up interrupt controller device node has interrupts property, while its pin banks might not (because they are muxed by the wake-up controller). Newer SoCs like Exynos850 and ExynosAutov9 do not used muxed wake-up interrupts: 1. Wake-up interrupt controller device node has no interrupts, 2. Its pin banks have interrupts (since there is no muxing). Their programming interface is however still compatible with Exynos7, thus change the bindings to express this: retain compatibility with Exynos7 and add new compatibility fallback of Exynos850 in newer designs. No driver changes are needed. This is necessary only to properly describe DTS. Acked-by:
Conor Dooley <conor.dooley@microchip.com> Acked-by:
Jaewon Kim <jaewon02.kim@samsung.com> Link: https://lore.kernel.org/r/20231122200407.423264-1-krzysztof.kozlowski@linaro.org Signed-off-by:
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- Nov 15, 2023
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Jaewon Kim authored
Add compatible string for exynosautov920 pin controller. Signed-off-by:
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Krzysztof Kozlowski authored
Samsung Exynos SoC reuses several devices from older designs, thus historically we kept the old (block's) compatible only. This works fine and there is no bug here, however guidelines expressed in Documentation/devicetree/bindings/writing-bindings.rst state that: 1. Compatibles should be specific. 2. We should add new compatibles in case of bugs or features. Add compatibles specific to each SoC in front of all old-SoC-like compatibles. Reviewed-by:
Alim Akhtar <alim.akhtar@samsung.com> Acked-by:
Rob Herring <robh@kernel.org> Reviewed-by:
Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20231108104343.24192-6-krzysztof.kozlowski@linaro.org Signed-off-by:
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- Oct 26, 2023
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Krzysztof Kozlowski authored
Add missing wakeup-parent property, already used by DTS to indicate that pins are wakeup capable: sa8775p-ride.dtb: pinctrl@f000000: 'wakeup-parent' does not match any of the regexes: '-state$', 'pinctrl-[0-9]+' Signed-off-by:
Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/r/20231018145750.429385-1-krzysztof.kozlowski@linaro.org Signed-off-by:
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- Oct 23, 2023
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Rob Herring authored
Just as unevaluatedProperties or additionalProperties are required at the top level of schemas, they should (and will) also be required for child node schemas. That ensures only documented properties are present for any node. Add the missing addtionalProperties to the 'gpio' child nodes. Signed-off-by:
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Rob Herring authored
The Broadcom pinctrl bindings are incomplete for child nodes as they are missing 'unevaluatedProperties: false' to prevent unknown properties. Fixing this reveals many warnings including having grandchild nodes in some cases. Many cases in the examples use 'group' property which is undocumented and not used by the driver. As the schemas define 'pins', I assume that is the correct name except for the one case, 6358, using 'groups' which is documented. Signed-off-by:
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- Oct 13, 2023
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Claudiu Beznea authored
Add documentation for the pin controller found on the Renesas RZ/G3S (R9A08G045) SoC. Compared to RZ/G2{L,UL}, RZ/G3S has 82 general-purpose IOs, no slew rate and output impedance support, and more values for drive strength which needs to be expressed in microamp. Signed-off-by:Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by:
Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230929053915.1530607-21-claudiu.beznea@bp.renesas.com Signed-off-by:
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- Oct 10, 2023
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Martin Kaiser authored
make CHECK_DTBS=y st/stm32f469-disco.dtb brings up a warning about a missing argument: stm32f469-disco.dtb: pinctrl@40020000: st,syscfg:0: [21, 8] is too short The description of the third entry indicates that this entry is optional. The code in stm32_pctrl_dt_setup_irq parses st,syscfg and treats the third entry as optional. It defaults to 0xf if not present in the devicetree. Update the schema to require at least two entries, use the same syntax as the description of renesas,ipmmu-main in Documentation/devicetree/bindings/iommu/renesas,ipmmu-vmsa.yaml. Signed-off-by:
Martin Kaiser <martin@kaiser.cx> Acked-by:
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- Sep 27, 2023
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Luca Weiss authored
Allow the gpio-reserved-ranges property on SC7280 TLMM. Acked-by:
Luca Weiss <luca.weiss@fairphone.com> Link: https://lore.kernel.org/r/20230919-fp5-initial-v2-5-14bb7cedadf5@fairphone.com Signed-off-by:
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Luca Weiss authored
Add the blsp_i2c6 function that can be found on some pins. Signed-off-by:
Luca Weiss <luca@z3ntu.xyz> Acked-by:
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- Sep 26, 2023
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Rob Herring authored
Just as unevaluatedProperties or additionalProperties are required at the top level of schemas, they should (and will) also be required for child node schemas. That ensures only documented properties are present for any node. Signed-off-by:
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- Sep 25, 2023
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Huqiang Qin authored
Add a new compatible name for Amlogic T7 pin controller, and add a new dt-binding header file which document the detail pin names. Signed-off-by:
Huqiang Qin <huqiang.qin@amlogic.com> Acked-by:
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- Sep 20, 2023
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Tzuyi Chang authored
Add device tree bindings for RTD1619B. Signed-off-by:
Tzuyi Chang <tychang@realtek.com> Reviewed-by:
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Tzuyi Chang authored
Add device tree bindings for RTD1319D. Signed-off-by:
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Tzuyi Chang authored
Add device tree bindings for RTD1315E. Signed-off-by:
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- Sep 11, 2023
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Tomer Maimon authored
Added device tree binding documentation for Nuvoton Arbel BMC NPCM8XX pinmux and GPIO controller. Signed-off-by:
Tomer Maimon <tmaimon77@gmail.com> Reviewed-by:
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- Aug 23, 2023
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Rob Herring authored
A schema under 'additionalProperties' works better for matching any property/node other than the ones explicitly listed. Convert the schema to use that rather than the wildcard and if/then schema. Drop 'phandle' properties which never need to be explicitly listed while we're here. Signed-off-by:
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- Aug 21, 2023
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Rob Herring authored
The Aspeed pinctrl bindings are missing an additionalProperties/ unevaluatedProperties schemas on the child pin mux nodes which means any undefined properties are allowed. In addition, using 'additionalProperties' for child nodes with any name works better than a pattern matching everything with an if/then schema to select nodes only. With 'additionalProperties' added, 'pins' and 'bias-disable' properties need to be added as they were not defined. A $ref to pinmux-node.yaml which defines the common property types was also missing. Signed-off-by:
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Rob Herring authored
'phandle' properties are implicitly supported on all nodes, so it shouldn't be listed in schemas. dtschema had a bug where 'phandle' and other implicit properties weren't being added under 'additionalProperties' schemas. That was fixed in v2023.07 release. Signed-off-by:
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- Aug 18, 2023
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Bjorn Helgaas authored
Fix typos in Documentation/devicetree/bindings. The changes are in descriptions or comments where they shouldn't affect functionality. Signed-off-by:
Bjorn Helgaas <bhelgaas@google.com> Link: https://lore.kernel.org/r/20230814212822.193684-3-helgaas@kernel.org Signed-off-by:
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- Aug 15, 2023
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Neil Armstrong authored
Due to lack of maintenance and stall of development for a few years now, and since no new features will ever be added upstream, remove the OX810 and OX820 pinctrl bindings. Acked-by:
Arnd Bergmann <arnd@arndb.de> Acked-by:
Daniel Golle <daniel@makrotopia.org> Signed-off-by:
Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20230814-topic-oxnas-upstream-remove-v3-2-04a0c5cdda52@linaro.org Signed-off-by:
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Stanislav Jakubek authored
Convert Broadcom BCM281xx pin controller bindings to DT schema. Signed-off-by:
Stanislav Jakubek <stano.jakubek@gmail.com> Reviewed-by:
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- Aug 10, 2023
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Dhruva Gole authored
Add the "ti,am654-padconf" compatible to support the new wakeup enable and status bits positions on K3 family SOCs that support the IO daisychain feature. Signed-off-by:
Dhruva Gole <d-gole@ti.com> Reviewed-by:
Tony Lindgren <tony@atomide.com> Reviewed-by:
Nishanth Menon <nm@ti.com> Link: https://lore.kernel.org/r/20230808102207.130177-2-d-gole@ti.com Signed-off-by:
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- Aug 07, 2023
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Tony Lindgren authored
Update binding for yaml and remove the old related txt bindings. Note that we are also adding the undocumented pinctrl-single,slew-rate property. And we only use the first example from the old binding. As we are mostly using a generic compatible across various SoCs, let's not start adding matches for random pin group node naming. Let's standardize on pin group node name ending in -pins with an optional instance number suffix. As a pin group may have additional pins added to it later on, let's always use -pins rather than -pin for the gropu name. Most of the dts files have been updated already for the pin group node names with a few changes still pending. Cc: Nishanth Menon <nm@ti.com> Cc: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by:
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Konrad Dybcio authored
Add bindings for pin controller in SM6115 Low Power Audio SubSystem LPASS). Signed-off-by:
Konrad Dybcio <konrad.dybcio@linaro.org> Reviewed-by:
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Sai Krishna Potthuri authored
Add 'output-enable' configuration parameter to the properties list. Using these pinctrl properties observed hang issues with older Xilinx ZynqMP Platform Management Firmware, hence reverted the patch previously. Commit ff835606 ("Revert "dt-bindings: pinctrl-zynqmp: Add output-enable configuration""). Support for configuring these properties added in Xilinx ZynqMP Platform Management firmware(PMUFW) Configuration Set version 2.0. Linux firmware driver checks if the configuration is supported by the PMUFW when it gets request for TRISTATE configuration from pinctrl driver. If it supports, then calls will be made otherwise it returns error. Signed-off-by:
Sai Krishna Potthuri <sai.krishna.potthuri@amd.com> Acked-by:
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- Jul 26, 2023
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Krzysztof Kozlowski authored
Document qcom,pmc8180-gpio and qcom,pmc8180c-gpio compatibles already used in DTS and in the same binding in allOf:if:then section for narrowing available GPIOs: sc8180x-primus.dtb: pmic@4: gpio@c000:compatible:0: 'qcom,pmc8180c-gpio' is not one of ... Fixes: 04bed640 ("dt-bindings: pinctrl: qcom,pmic-gpio: describe gpio-line-names") Acked-by:
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Konrad Dybcio authored
Add bindings for pin controller in SM6115 Low Power Audio SubSystem LPASS). Signed-off-by:
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- Jul 24, 2023
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Krzysztof Kozlowski authored
Add bindings for pin controller in SM8350 Low Power Audio SubSystem (LPASS). Reviewed-by:
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- Jul 23, 2023
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Shazad Hussain authored
Alternative function 'gpio' is not listed in the constants for pin configuration, so adding this constant to the list. Cc: stable@vger.kernel.org Fixes: 9a2aaee2 ("dt-bindings: pinctrl: describe sa8775p-tlmm") Signed-off-by:
Shazad Hussain <quic_shazhuss@quicinc.com> Reviewed-by:
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Huqiang Qin authored
Add a new compatible name for Amlogic C3 pin controller, and add a new dt-binding header file which document the detail pin names. Signed-off-by:
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- Jul 20, 2023
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Konrad Dybcio authored
This property was introduced as a bad hack. Now that it's useless, get rid of it. Signed-off-by:
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Patrick Rudolph authored
This patch adds support for an optional reset pin. The reset pin is used to bring the chip into a known state and has an internal pull-down, allowing it to be left floating if not needed. Signed-off-by:
Patrick Rudolph <patrick.rudolph@9elements.com> Signed-off-by:
Naresh Solanki <Naresh.Solanki@9elements.com> Reviewed-by:
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- Jul 16, 2023
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Neil Armstrong authored
Allow gpio hog subnodes to the gpio subnode. Fixes: 94df03a4 ("dt-bindings: pinctrl: Convert Amlogic Meson pinctrl binding") Reviewed-by:
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Neil Armstrong authored
Allow gpio-line-names property for the gpio subnodes. Fixes: 94df03a4 ("dt-bindings: pinctrl: Convert Amlogic Meson pinctrl binding") Signed-off-by:
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Rohit Agarwal authored
Add support for the pmx75 GPIO support to the Qualcomm PMIC GPIO binding. Signed-off-by:
Rohit Agarwal <quic_rohiagar@quicinc.com> Reviewed-by:
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Rohit Agarwal authored
Add support for the pm7550ba GPIO support to the Qualcomm PMIC GPIO binding. Signed-off-by:
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- Jun 19, 2023
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Krzysztof Kozlowski authored
DTS and driver already support pcie_clkreq function for a pin. Add it to fix dtbs_check warning: qcom-sdx65-mtp.dtb: pinctrl@f100000: pcie-ep-clkreq-default-state: 'oneOf' conditional failed, one must be fixed: 'bias-disable', 'drive-strength', 'function', 'pins' do not match any of the regexes: '-pins$', 'pinctrl-[0-9]+' 'pcie_clkreq' is not one of ['blsp_uart1', 'blsp_spi1', ... 'gpio'] Signed-off-by:
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- Jun 13, 2023
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Rob Herring authored
The "qcom,paired" schema is all wrong. First, it's a list rather than an object(dictionary). Second, it is missing a required type. The meta-schema normally catches this, but schemas under "$defs" was not getting checked. A fix for that is pending. Fixes: f9a06b81 ("dt-bindings: pinctrl: qcom,pmic-mpp: Convert qcom pmic mpp bindings to YAML") Reviewed-by:
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