- Jun 04, 2015
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Alex Deucher authored
This adds the non-asic specific core driver code. v2: remove extra kconfig option v3: implement minor fixes from Fengguang Wu v4: fix cast in amdgpu_ucode.c Acked-by:
Christian König <christian.koenig@amd.com> Acked-by:
Jammy Zhou <Jammy.Zhou@amd.com> Signed-off-by:
Alex Deucher <alexander.deucher@amd.com>
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- Jan 04, 2015
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Ben Goz authored
The MQDs for CI and VI are different. Therefore, the MQD manager module need to be H/W specific. This patch splits the current MQD manager into three files: - kfd_mqd_manager.c, which contains common functions and initializes the specific mqd manager module according to the H/W - kfd_mqd_manager_cik.c, which contains Kaveri specific functions. This is basically the old kfd_mqd_manager.c - kfd_mqd_manager_vi.c, which will contain VI specific functions. Currently it is not implemented except for returning NULL on initialization. Signed-off-by:
Ben Goz <ben.goz@amd.com> Signed-off-by:
Oded Gabbay <oded.gabbay@amd.com> Reviewed-by:
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- Jun 11, 2014
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Ben Skeggs authored
There's also provisions to allow a pad to be locked with a specific routing, for an indefinite period of time. This will be used in future patches. The G94+ pad driver will now also power-down pads when not required. Signed-off-by:Ben Skeggs <bskeggs@redhat.com>
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- Jan 23, 2014
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Ben Skeggs authored
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- Nov 08, 2013
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Ben Skeggs authored
Not even remotely ready for the vast majority of the world. Signed-off-by: -
Ben Skeggs authored
This is what NVIDIA do on these chipsets, let's hope it works around the reported MSI failures for us on NV86. v2: updated to include G92, as per information provided by NVIDIA. Signed-off-by: -
Ben Skeggs authored
v2. updated to cover GF104, as per information provided by NVIDIA. Reported-by:
Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by:
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- Jul 05, 2013
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Maarten Lankhorst authored
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Ben Skeggs authored
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- Jul 01, 2013
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Ben Skeggs authored
No code changes, proven by envyas producing identical binaries. Signed-off-by: -
Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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Ben Skeggs authored
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- Apr 26, 2013
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Ben Skeggs authored
Seen in the wild, don't have the hardware but this hacks things up to treat it the same as GF119 for now. Should be relatively safe, I'd be very surprised if anything major changed outside of PGRAPH. PGRAPH (3D etc) is disabled by default however until it's confirmed working. Signed-off-by:
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- Dec 23, 2012
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Ben Skeggs authored
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- Oct 03, 2012
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Ben Skeggs authored
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Ben Skeggs authored
Future work will be headed in the way of separating the policy supplied by the nouveau drm module from the mechanisms provided by the driver core. There will be a couple of major classes (subdev, engine) of driver modules that have clearly defined tasks, and the further directory structure change is to reflect this. No code changes here whatsoever, aside from fixing up a couple of include file pathnames. Signed-off-by:
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- Dec 21, 2011
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Ben Skeggs authored
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Ben Skeggs authored
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- Sep 20, 2011
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Ben Skeggs authored
untested, written from a trace, accel disabled by default until it is Signed-off-by:
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- Jun 23, 2011
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Ben Skeggs authored
The ability to use NVIDIA's fuc has been retained *temporarily* in order to better debug any issues that may be lingering in our initial attempt at writing this ucode. Once I'm fairly confident we're okay, it'll be removed. There's a number of things not implemented by this fuc currently, but most of it is sets of state that our context setup would not have used anyway. No doubt we'll find out what they're for at some point, and implement it if required. This has been tested on 0xc0/0xc4 thus far, and from what I could tell it worked as well as NVIDIA's. It's also been tested on 0xc1, but even with NVIDIA's fuc that chipset doesn't work correctly with nouveau yet. 0xc3/0xc8/0xce should in theory be supported too, but I don't have the hardware to check that. There's no doubt numerous bugs to squash yet, please report any! Signed-off-by:
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