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dm: x86: spi: Convert ICH SPI driver to driver model PCI API
At present this SPI driver works by searching the PCI buses for its peripheral. It also uses the legacy PCI API. In addition the driver has code to determine the type of Intel PCH that is used (version 7 or version 9). Now that we have proper PCH drivers we can use those to obtain the information we need. While the device tree has a node for the SPI peripheral it is not in the right place. It should be on the PCI bus as a sub-peripheral of the LPC device. Update the device tree files to show the SPI controller within the PCH, so that PCI access works as expected. This patch includes Bin's fix-up patch from here: https://patchwork.ozlabs.org/patch/569478/ Signed-off-by:Simon Glass <sjg@chromium.org> Signed-off-by:
Bin Meng <bmeng.cn@gmail.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Tested-by:
Bin Meng <bmeng.cn@gmail.com>
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- arch/x86/cpu/coreboot/pci.c 2 additions, 1 deletionarch/x86/cpu/coreboot/pci.c
- arch/x86/cpu/irq.c 6 additions, 1 deletionarch/x86/cpu/irq.c
- arch/x86/cpu/ivybridge/bd82x6x.c 46 additions, 1 deletionarch/x86/cpu/ivybridge/bd82x6x.c
- arch/x86/dts/bayleybay.dts 84 additions, 76 deletionsarch/x86/dts/bayleybay.dts
- arch/x86/dts/broadwell_som-6896.dts 15 additions, 9 deletionsarch/x86/dts/broadwell_som-6896.dts
- arch/x86/dts/chromebook_link.dts 3 additions, 2 deletionsarch/x86/dts/chromebook_link.dts
- arch/x86/dts/chromebox_panther.dts 20 additions, 14 deletionsarch/x86/dts/chromebox_panther.dts
- arch/x86/dts/crownbay.dts 78 additions, 72 deletionsarch/x86/dts/crownbay.dts
- arch/x86/dts/galileo.dts 52 additions, 47 deletionsarch/x86/dts/galileo.dts
- arch/x86/dts/minnowmax.dts 83 additions, 75 deletionsarch/x86/dts/minnowmax.dts
- arch/x86/dts/qemu-x86_i440fx.dts 15 additions, 11 deletionsarch/x86/dts/qemu-x86_i440fx.dts
- arch/x86/dts/qemu-x86_q35.dts 21 additions, 17 deletionsarch/x86/dts/qemu-x86_q35.dts
- drivers/spi/ich.c 36 additions, 116 deletionsdrivers/spi/ich.c
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