The chip select 1 of the NAND controller is available if you want to
use, although the pins are shared with UART port 2.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

The register value should be 1, not 4.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

PH1-Pro5 includes a newer version of DDR PHY IP.  Some registers
have been added to the reserved areas.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Since commit 92ac5208 (net: Remove all references to
CONFIG_ETHADDR and friends), the ethernet device on UniPhier boards
is not working because of the incorrect (all-zero) MAC address.

Enable CONFIG_NET_RANDOM_ETHADDR to generate the random one.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

One disadvantage of commit a26cd049 (arch: Make board selection
choices optional) is that Kconfig could create such an insane
.config file that no board is selected.

As PH1-Pro4 is the main stream of UniPhier SoC family, rip off the
"optional" again in favor of PH1-Pro4 as the default SoC.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

This file is only built for SPL.  These ifdef conditionals are
unnecessary because UniPhier platform now supports UART on SPL.
Show appropriate messages on error.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

Cache coherency for SMP is cared by Linux.  In U-Boot, the secondary
CPU(s) are just sleeping.  Nothing in memory is shared with the
primary CPU.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

For the same reason as commit d0c47b3e (serial: UniPhier: use
32 bit register access), use "str" instead of "strb" for the LCR
register setting.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

The business for UniPhier Soc family has been transferred from
Panasonic Corporation to Socionext Inc.

Update the SoC select menu in Kconfig.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

In the Linux coding style, it is recommended to include <linux/io.h>
rather than <asm/io.h>.  Follow this trend.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

sun8i uses the same PSCI backend as sun6i, without power clamps.
Since there is no secure SRAM, the backend is placed at the end
of DRAM.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

sun8i can share the PSCI backend with sun6i. Only difference
is sun8i does not have CPU power clamp controls.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Now that we have a PSCI backend for sun6i, enable it.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

This adds PSCI support for sun6i. So far it only supports
the PWR_ON method.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

The PSCI code only works for sun7i. Rename it with _sun7i suffix,
and build only if building for sun7i.

This paves the way for adding PSCI support for other platforms.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

The PSCI CPU_ON code accesses quite a few registers. Document
their names to make it easier to cross reference.

Also explain "lock cpu" and "unlock cpu" as enabling/disabling
debug access.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

This commit adds support to the sunxi SPL to load u-boot from the internal
NAND. Note this only adds support to access the boot partitions to load
u-boot, full NAND support to load the kernel, etc. from the nand data
partition will come later.

Signed-off-by: Roy Spliet <r.spliet@ultimaker.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Make sure definitions for NAND clock and DMA gate bits are the same
across boards.

Signed-off-by: Roy Spliet <r.spliet@ultimaker.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Signed-off-by: Roy Spliet <r.spliet@ultimaker.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

This change is necessary to calculate correct checksum for NAND
boot. Works both for MMC and NAND. Without it BROM rejects boot image
as invalid (bad checksum). (Changes block size from 0x200 to 0x2000).

Signed-off-by: Daniel Kochmański <dkochmanski@turtle-solutions.eu>
Signed-off-by: Roy Spliet <r.spliet@ultimaker.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

Add initial sun9i (A80) support, only uart + mmc are supported for now.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

The A1 SRAM Base differs between sun9i and the others, update sunxi-common.h
to deal with this, so that we do not set the initial stack pointer to point
to the BROM.

This avoids the need for the weird undocumented register write I previously
took from the allwiner u-boot sources and which needed #ifdef-ery in start.S
as it needed to be done really early on.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

The DRAM Base differs between sun9i and the others, update sunxi-common.h to
deal with this.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

The latest versions of the fel tool support loading normal u-boot builds
directly, and this is now the preferred way to use the fel boot method.

This commit removes support for the old deprecated standalone fel builds.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

Unlike the A31 and the A23 the A33 actually has a SID inside the SoC again,
but sid[3] is 0 (at least on some SoCs), so it is better to use the axp221
sid.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>

The usb-kbd key repeat code assumes that reports get repeated every 40 ms,
this is never true when using CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP, and
does not always works for CONFIG_SYS_USB_EVENT_POLL and
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE since not all usb keyboards honor
the usb_set_idle() command.

For CONFIG_SYS_USB_EVENT_POLL we must use usb_set_idle() since we do a
blocking wait for the hid report, so if we do not tell the keyboard to send
a hid report every 40ms even if nothing changes then we will block u-boot
for 1s (the default u-boot usb interrupt packet timeout). Note that in this
case on keyboards which do not support usb_set_idle() we loose and we actually
get 1s latencies on other u-boot activities.

For the other poll-methods this commit stops using usb_set_idle() and instead
repeats the last received hid-report every 40 ms as long as no new hid-report
is received. This fixes key-repeat not working at all with
CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP and fixes it not working with
keyboards which do not implement usb_set_idle() when using
CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>

This has been tested to the extent that I can enumerate
a asix usb networking adapter and boot a kernel over usb
on the 96boards hikey u-boot port I'm currently doing.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>

Update the ci_udc driver to support bulk transfer
and also added capability of having multiple dtds
if requested data is more than 16K.
These changes are tested for both the DFU and lthor.

Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>

The compiler did not catch this as it was marked __maybe_unused.

Signed-off-by: Hans de Goede <hdegoede@redhat.com>

Since i've been married, i also have a new surname.
Mr. Petermaier moved to Mr. Schmelzer.

In this patch i update all files in which my (old) name is present.

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>

a6b541b0: TI ARMv7: Don't use GD before crt0.S has set it

moves the init of the debug uart at the very end of SPL code.
Enable it for the siemens board earlier, as they print
ddr settings ... all debug output before board_init_r()
is here currently useless. Maybe we must rework this
globally?

Signed-off-by: Heiko Schocher <hs@denx.de>

arm:  +   lsxhl
w+board/buffalo/lsxl/lsxl.c: In function 'rescue_mode':
w+board/buffalo/lsxl/lsxl.c:230:8: warning: unused variable 'enetaddr' [-Wunused-variable]
       arm:  +   lschlv2
w+board/buffalo/lsxl/lsxl.c: In function 'rescue_mode':
w+board/buffalo/lsxl/lsxl.c:230:8: warning: unused variable 'enetaddr' [-Wunused-variable]

Remove the unused variable.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

Function 'sprintf' does not check buffer boundaries but outputs
to the buffer of fixed size which could potentially cause buffer
overflow. Use a safer function to replace it.

Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>

Add support for the STM32F1 family to the STM32 gpio driver.

Signed-off-by: Matt Porter <mporter@konsulko.com>

Add ARMv7M STM32F1 support including clocks, timer, gpio, and flash.

Signed-off-by: Matt Porter <mporter@konsulko.com>