Stefan Roese authored 10 years ago and Heiko Schocher committed 10 years ago

The current implementation for baudrate calculation is incorrect.
This part from the formula:

"2 ^ (n + 1)" is not equivalent to (1 << n) but to (2 << n)!

This patch fixes this and moves this calculation to a function instead of using a macro.
This new function is taken from the Linux kernel.

This was detected and tested on the Marvell Armada A38x DB-88F6820-GP eval board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Cc: Luka Perkov <luka.perkov@sartura.hr>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Heiko Schocher <hs@denx.de>
Acked-by: Hans de Goede <hdegoede@redhat.com>

Rob Herring authored 10 years ago and Heiko Schocher committed 10 years ago

Change addresses to unsigned long to be compatible with 64-bit builds.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Heiko Schocher <hs@denx.de>

Change addresses to unsigned long to be compatible with 64-bit builds.
Regardless of fixing warnings, the device is still only 32-bit capable.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>

Change addresses to unsigned long to be compatible with 64-bit builds.
Regardless of fixing warnings, the device is still only 32-bit capable.

Signed-off-by: Rob Herring <robh@kernel.org>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>

SDHCI_HOST_CONTROL is a byte-sized register, so don't write to it
as if it were a long, as that would result in clobbering the three
registers following.

Signed-off-by: Matt Reimer <mreimer@sdgsystems.com>

Properly mask SELBASECLK by using an actual mask rather than the
number of bits to shift in order to create the mask.

Signed-off-by: Matt Reimer <mreimer@sdgsystems.com>
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>

Signed-off-by: Tom Rini <trini@konsulko.com>

Boards that haven't been converted to GENERIC_BOARD does
*not* mean they should be removed.

Signed-off-by: Kim Phillips <kim.phillips@freescale.com>

- add more targets for building with buildman:
  - avr32
  - m68k

and while at it, sort the list alphabetical

Reviewed-by: Roger Meier <r.meier@siemens.com>
Signed-off-by: Heiko Schocher <hs@denx.de>

This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Larry Johnson <lrj@acm.org>

This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Eric Millbrandt <emillbrandt@dekaresearch.com>

They have not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Erik Theisen <etheisen@mindspring.com>

They have not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Stephen Williams <steve@icarus.com>

This has not been converted to Generic Board, so should be removed.
(See doc/README.generic-board for details.)

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

We don't want that CONSOLE is redirected to LCD upon init, we rather prefer
that console is still on the serial line.

Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>

Commit f022d36e introduces
error register offset.

Change the "char reserved3[59]" to "char reserved3[56]".

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Tested-by: Fabio Estevam <fabio.estevam@freescale.com>

The build break was caused by one of my previous commit:
'odroid: defconfig: disable memset at malloc init'

It removes the dts from odroid defconfig - rebase mistake.

Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Acked-by: Lukasz Majewski <l.majewski@samsung.com>
Acked-by: Minkyu Kang <mk7.kang@samsung.com>

Signed-off-by: Hannes Petermaier <hannes.petermaier@br-automation.com>
Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>

Since commit e02ee254 (kconfig: switch to single .config
configuration), the prefixes in defconfig files such as "+S:",
"+ST:", etc., are meaningless.

This commit was generated by the following command:

  find configs -name '*_defconfig' | xargs sed -i 's/^+*S*T*://'

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

In the case of BUILD_NBUILDS > 1, MAKEALL would try to print the size
immediately after the u-boot binary is deleted by the call to:

make -s clean

Move the size print to before the clean

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

Panasonic's System LSI products, UniPhier SoC family, have been
transferred to Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

I have transferred to Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

I have transferred to Socionext Inc.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

The Driver Model description in README was removed by commit
65eb659e (README: remove description about driver model
configuration options), and was revived by mistake by commit
b79dadf8 when resolving the conflict.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Tom Rini <trini@konsulko.com>
Acked-by: Simon Glass <sjg@chromium.org>

This should make it more clear why there appear to be C pre-processor
symbols in the file that contain mixed case. They're really error
messages.

Suggested-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

When Beagle X15 is connected to Gigabit switch, it takes
more time to finish auto-negotiation than on a 10/100 switch.

The default 4 second limit times-out more often than not. This is
observed when testing with a D-Link DGS-1008A desktop switch.

Increase the auto-negotiation time-out for Beagle-X15 to handle
this case.

Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

RX51 has a secure logic which uses different parameters compared to
traditional implementation. So, make the generic secure acr write
over-ride-able by board file and refactor rx51 code to use this.

While at it, enable the OMAP3 specific errata code for 454179, 430973,
621766.

Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

Enable the OMAP3 specific errata code for 454179, 430973, 621766
and while at it, remove legacy non-revision checked errata logic.

Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Matt Porter <mporter@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

Update to existing recommendation for L2ACTLR configuration to prevent
system instability and optimize performance.

These apply to both OMAP5 and DRA7.

Reported-by: Vivek Chengalvala <vchengalvala@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

This patch enables the workaround for ARM errata 798870 for OMAP5 /
DRA7 which says "If back-to-back speculative cache line fills (fill
A and fill B) are issued from the L1 data cache of a CPU to the
L2 cache, the second request (fill B) is then cancelled, and the
second request would have detected a hazard against a recent write or
eviction (write B) to the same cache line as fill B then the L2 logic
might deadlock."

An l2auxctlr accessor implementation for OMAP5 and DRA7 is introduced
here as well.

Signed-off-by: Praveen Rao <prao@ti.com>
Signed-off-by: Angela Stegmaier <angelabaker@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Matt Porter <mporter@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

omap_smc1 is now generic enough to remove duplicate
omap3_gp_romcode_call logic that omap3 introduced.

As part of this change, move to using the generic lowlevel_init.S for
omap3 as well.

Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Matt Porter <mporter@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

This is in preperation of using generic cross OMAP code.

Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Matt Porter <mporter@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

set_pl310_ctrl_reg does use the Secure Monitor Call (SMC) to setup
PL310 control register, however, that is something that is generic
enough to be used for OMAP5 generation of processors as well. The only
difference being the service being invoked for the function.

So, convert the service to a macro and use a generic name (same as
that used in Linux for some consistency). While at that, also add a
data barrier which is necessary as per recommendation.

While at this, smc #0 is maintained as handcoded assembly thanks to
various gcc version eccentricities, discussion thread:
http://marc.info/?t=142542166800001&r=1&w=2



Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Matt Porter <mporter@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

621766: Under a specific set of conditions, executing a sequence of
	NEON or vfp load instructions can cause processor deadlock
Impacts: Every Cortex-A8 processors with revision lower than r2p1
Work around: Set L1NEON to 1

Based on ARM errata Document revision 20.0 (13 Nov 2010)

Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Matt Porter <mporter@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

430973: Stale prediction on replaced inter working branch causes
	Cortex-A8 to execute in the wrong ARM/Thumb state
Impacts: Every Cortex-A8 processors with revision lower than r2p1
Work around: Set IBE to 1

Based on ARM errata Document revision 20.0 (13 Nov 2010)

Signed-off-by: Nishanth Menon <nm@ti.com>
Tested-by: Matt Porter <mporter@konsulko.com>
Reviewed-by: Tom Rini <trini@konsulko.com>