- Mar 28, 2013
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R Sricharan authored
The 'XN' execute never bit is set in the pagetables. This will prevent speculative prefetches to non executable regions. But the domain permissions are set as master in the DACR register. So the pagetable attribute for 'XN' is not effective. Change the permissions to client. This fixes lot of speculative prefetch aborts seen on OMAP5 secure devices. Signed-off-by:
R Sricharan <r.sricharan@ti.com> Tested-by:
Vincent Stehle <v-stehle@ti.com> Cc: Vincent Stehle <v-stehle@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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R Sricharan authored
Introduce a weak version of dram_bank_setup function to allow a platform specific function. This is used in the subsequent patch to setup dram region without 'XN' attribute in order to enable the region under client permissions. Signed-off-by:
R Sricharan <r.sricharan@ti.com> Cc: Vincent Stehle <v-stehle@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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Vincent Stehlé authored
We declare the set_section_dcache function globally in the cache header, for later use by e.g. machine specific code. Signed-off-by: Vincent Stehlé <v-stehle <at> ti.com> Cc: Tom Rini <trini <at> ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
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- Mar 26, 2013
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Albert ARIBAUD authored
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Albert ARIBAUD authored
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- Mar 25, 2013
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Tom Warren authored
Tested on my Dalmore E1611 board, eMMC and SD-Card work fine, can load a kernel off of an SD card OK, card detect works, and the env is now stored in eMMC (end of the 2nd 'boot' sector, same as Tegra20/30). Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Tom Warren authored
T114 requires SD bus power-rail bringup for the SDIO card on SDMMC3. Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Tom Warren authored
SDIO1 (the SD-card slot on Dalmore) needs to have its pads setup before the MMC driver is added. Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Tom Warren authored
Took these values directly from the kernel dts files. Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Allen Martin authored
Turn on SPI in dalmore config file Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Allen Martin authored
Add driver for tegra114 SPI controller. This controller is not compatible with either the tegra20 or tegra30 controllers, so it requires a new driver. Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Allen Martin authored
Dalmore has a SPI flash part attached to controller 4, so enable controller 4 and set to 25MHz. Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Allen Martin authored
Add nodes for t114 SPI controller hardware Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Allen Martin authored
Add node for apbdma controller hardware. Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Allen Martin authored
Add "nvidia,tegra114-spi" to represent t114 SPI controller hardware. Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Allen Martin authored
Add support for Winbond W25Q32DW 32Mbit part Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Allen Martin authored
Add a common interface to fdt based SPI drivers. Each driver is represented by a table entry in fdt_spi_drivers[]. If there are multiple SPI drivers in the table, the first driver to return success from spi_init() will be registered as the SPI driver. Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Allen Martin authored
Make the tegra20 SPI driver similar to the tegra30 (and soon to be tegra114) SPI drivers in preparation of common fdt SPI driver front end. Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Allen Martin authored
Move register structs from headers into .c files and use common name. This is in preparation of making common fdt front end for SPI drivers. Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Allen Martin authored
Remove non fdt support from tegra20 and tegra30 SPI drivers in preparation of new common fdt based SPI driver front end. Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Allen Martin authored
Rename tegra SPI drivers to tegra20_flash and tegra20_slink in preparation for commonization and addition of tegra114_spi. Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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Allen Martin authored
This feature was only used for tegra20 seaboard that had a pinmux conflict on the SPI pins. These boards were never manufactured, so remove this support to clean up SPI driver. Signed-off-by:
Allen Martin <amartin@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com> Reviewed-by:
Stephen Warren <swarren@nvidia.com>
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- Mar 24, 2013
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Albert ARIBAUD authored
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Peter Korsgaard authored
Gets rid of warnings from omap_gpio: ERROR : check_gpio: invalid GPIO -1 (and undefined behaviour as the -1 error code is interpreted as gpio value) Signed-off-by:
Peter Korsgaard <peter.korsgaard@barco.com>
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Peter Korsgaard authored
Let mmc_getcd() return true and mmc_getwp() false if mmc driver doesn't provide handlers for them. Signed-off-by:
Peter Korsgaard <peter.korsgaard@barco.com> [trini: Add braces around first if test in each case to fix warning] Signed-off-by:
Tom Rini <trini@ti.com>
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Tom Rini authored
All of these platforms have memory starting at 0x80000000, so this is the correct CONFIG_STANDALONE_LOAD_ADDR for all of them. Acked-by:
Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by:
Tom Rini <trini@ti.com>
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Tom Rini authored
Tested-by:
Rao Bodapati <rao@circuitco.com> Signed-off-by:
Tom Rini <trini@ti.com>
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Matt Porter authored
Add TI814X EVM board directory, config file, and MAINTAINERS entry. Enable build. Signed-off-by:
Matt Porter <mporter@ti.com> Reviewed-by:
Tom Rini <trini@ti.com> [trini: Adapt to recent omap_hsmmc requirements, Matt re-tested] Signed-off-by:
Tom Rini <trini@ti.com>
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Matt Porter authored
TI814X requires the same quirks as AM33XX to be enabled. Signed-off-by:
Matt Porter <mporter@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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Matt Porter authored
TI814x has a 192MHz hsmmc reference clock. Select that clock rate when building for TI814x. Signed-off-by:
Matt Porter <mporter@ti.com>
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Matt Porter authored
Adds a config_dmm() routine to support TI814X DMM configuration. Signed-off-by:
Matt Porter <mporter@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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Matt Porter authored
Support the ti814x specific register definitions within arch-am33xx. Signed-off-by:
Matt Porter <mporter@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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Matt Porter authored
AM33XX and TI814X have a similar mux though the pinmux register layout and address space differ. Add a separate ti814x mux include to support the TI814X-specific differences. Signed-off-by:
Matt Porter <mporter@ti.com> Reviewed-by:
Tom Rini <trini@ti.com> Acked-by:
Peter Korsgaard <jacmet@sunsite.dk>
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Matt Porter authored
Split clock.c for am335x and ti814x and add ti814x specific clock support. Signed-off-by:
Matt Porter <mporter@ti.com>
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Matt Porter authored
The AM33xx emif4/ddr support closely matches what is need to support TI814x except that TI814x has two EMIF instances. Refactor all the emif4 helper calls and the config_ddr() init function to use an additional instance number argument. Signed-off-by:
Matt Porter <mporter@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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Matt Porter authored
Eliminate AM33xx specific names to prepare for TI814x support within AM33xx-land. Signed-off-by:
Matt Porter <mporter@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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Tom Rini authored
- In arch/arm/cpu/armv7/omap-common/timer.c, drivers/mtd/nand/omap_gpmc.c and drivers/net/cpsw.c add #include files that the driver needs but had been relying on <config.h> to bring in. - In arch/arm/cpu/armv7/omap-common/lowlevel_init.S add <config.h> - In am335x_evm.h and pcm051.h don't globally include <asm/arch/hardware.h> and <asm/arch/cpu.h> but just <asm/arch/omap.h> as that is the only include which defines things the config uses. Cc: Lars Poeschel <poeschel@lemonage.de> Signed-off-by:
Tom Rini <trini@ti.com>
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Enric Balletbo i Serra authored
With v3.9 and later of the Linux Kernel defaulting to multi-platform images with omap2plus_defconfig, uImage isn't builtable anymore by default. Add CONFIG_CMD_BOOTZ so that we can still boot something the kernel spits out. Signed-off-by:
Enric Balletbo i Serra <eballetbo@iseebcn.com> Reviewed-by:
Javier Martinez Canillas <javier@dowhile0.org>
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Enric Balletbo i Serra authored
Just fix a typo displaying the CPU info. With CONFIG_DISPLAY_INFO we see something like AMAM335X-GP rev 0 instead of AM335X-GP rev 0. Signed-off-by:
Enric Balletbo i Serra <eballetbo@iseebcn.com> Reviewed-by:
Javier Martinez Canillas <javier@dowhile0.org>
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Vaibhav Hiremath authored
Enable DDR PHY dynamic power down bit, which enables powering down the IO receiver when not performing read. This also helps in reducing overall power consumption in low power states (suspend/standby). Signed-off-by:
Vaibhav Hiremath <hvaibhav@ti.com> Signed-off-by:
Satyanarayana, Sandhya <sandhya.satyanarayana@ti.com> Cc: Tom Rini <trini@ti.com> Reviewed-by:
Tom Rini <trini@ti.com>
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