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Commit cfe25561 authored by Beniamino Galvani's avatar Beniamino Galvani Committed by Tom Rini
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meson: odroid-c2: enable Ethernet support through the device tree


Remove the device definition from board file, update the driver with
the new compatible property and update config with necessary options.

Signed-off-by: default avatarBeniamino Galvani <b.galvani@gmail.com>
Reviewed-by: default avatarSimon Glass <sjg@chromium.org>
parent 677b5358
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......@@ -20,9 +20,6 @@
#define GXBB_GPIO_IN(n) GXBB_PERIPHS_ADDR(_GXBB_GPIO_OFF(n) + 1)
#define GXBB_GPIO_OUT(n) GXBB_PERIPHS_ADDR(_GXBB_GPIO_OFF(n) + 2)
/* Pinmux registers 0 to 12 */
#define GXBB_PINMUX(n) GXBB_PERIPHS_ADDR(0x2c + (n))
#define GXBB_ETH_REG_0 GXBB_PERIPHS_ADDR(0x50)
#define GXBB_ETH_REG_1 GXBB_PERIPHS_ADDR(0x51)
......
......@@ -21,24 +21,11 @@ int board_init(void)
return 0;
}
static const struct eth_pdata gxbb_eth_pdata = {
.iobase = GXBB_ETH_BASE,
.phy_interface = PHY_INTERFACE_MODE_RGMII,
};
U_BOOT_DEVICE(meson_eth) = {
.name = "eth_designware",
.platdata = &gxbb_eth_pdata,
};
int misc_init_r(void)
{
u8 mac_addr[EFUSE_MAC_SIZE];
ssize_t len;
/* Select Ethernet function */
setbits_le32(GXBB_PINMUX(6), 0x3fff);
/* Set RGMII mode */
setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF |
GXBB_ETH_REG_0_TX_PHASE(1) |
......
......@@ -14,6 +14,9 @@ CONFIG_HUSH_PARSER=y
CONFIG_OF_CONTROL=y
CONFIG_NET_RANDOM_ETHADDR=y
CONFIG_DM_ETH=y
CONFIG_ETH_DESIGNWARE=y
CONFIG_PINCTRL=y
CONFIG_PINCTRL_MESON_GXBB=y
CONFIG_DEBUG_UART=y
CONFIG_DEBUG_UART_MESON=y
CONFIG_DEBUG_UART_BASE=0xc81004c0
......
......@@ -737,6 +737,7 @@ static int designware_eth_ofdata_to_platdata(struct udevice *dev)
static const struct udevice_id designware_eth_ids[] = {
{ .compatible = "allwinner,sun7i-a20-gmac" },
{ .compatible = "altr,socfpga-stmmac" },
{ .compatible = "amlogic,meson6-dwmac" },
{ }
};
......
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