- Jun 26, 2013
-
-
Signed-off-by:
Eric Jarrige <eric.jarrige@armadeus.org> Signed-off-by:
Philippe Reynes <tremyfr@yahoo.fr>
-
Signed-off-by: -
The SabreSD platform is available with i.MX6Q or i.MX6DL. This patch adds the support of the i.MX6DL. The config file and the board directory are renamed to remove the reference to the MX6Q. Signed-off-by:
Pierre Aubert <p.aubert@staubli.com> CC: Stefano Babic <sbabic@denx.de> Reviewed-by:
Fabio Estevam <fabio.estevam@freescale.com>
-
Signed-off-by: -
Signed-off-by:
Dirk Behme <dirk.behme@gmail.com>
-
Signed-off-by:Eric Nelson <eric.nelson@boundarydevices.com>
-
The spi clock divisor is of the form x * (2**y), or x << y, where x is 1 to 16, and y is 0 to 15. Note the similarity with floating point numbers. Convert the desired divisor to the smallest number which is >= desired divisor, and can be represented in this form. The previous algorithm chose a divisor which could be almost twice as large as needed. Signed-off-by:
Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by:
-
Fix two issues with the calculation of pre_div and post_div: 1. pre_div: While the calculation of pre_div looks correct, to set the CONREG[15-12] bits pre_div needs to be decremented by 1: The i.MX 6Dual/6Quad Applications Processor Reference Manual (IMX6DQRM Rev. 0, 11/2012) states: CONREG[15-12]: PRE_DIVIDER 0000 Divide by 1 0001 Divide by 2 0010 Divide by 3 ... 1101 Divide by 14 1110 Divide by 15 1111 Divide by 16 I.e. if we want to divide by 2, we have to write 1 to CONREG[15-12]. 2. In case the post divider becomes necessary, pre_div will be divided by 16. So set pre_div to 16, too. And not 15. Both issues above are tested using the following examples: clk_src = 60000000 (60MHz, default i.MX6 ECSPI clock) a) max_hz == 23000000 (23MHz, max i.MX6 ECSPI read clock) -> pre_div = 3 (divide by 3 => CONREG[15-12] == 2) -> post_div = 0 (divide by 1 => CONREG[11- 8] == 0) => 60MHz / 3 = 20MHz SPI clock b) max_hz == 2000000 (2MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 1 (divide by 2 => CONREG[11- 8] == 1) => 60MHz / 32 = 1.875MHz SPI clock c) max_hz == 1000000 (1MHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 2 (divide by 4 => CONREG[11- 8] == 2) => 60MHz / 64 = 937.5kHz SPI clock d) max_hz == 500000 (500kHz) -> pre_div = 16 (divide by 16 => CONREG[15-12] == 15) -> post_div = 3 (divide by 8 => CONREG[11- 8] == 3) => 60MHz / 128 = 468.75kHz SPI clock Signed-off-by: -
Add support for the Quad version of Wandboard; fix compile warning resulting from having 2G of memory. Signed-off-by:
Tapani Utriainen <tapani@technexion.com> Signed-off-by:
Otavio Salvador <otavio@ossystems.com.br> Acked-by:
Stefano Babic <sbabic@denx.de>
-
- Jun 06, 2013
-
-
No need to use the 'status' variable, so just remove it. Signed-off-by:
-
When running the "save" command several times on a mx6qsabresd we see: U-Boot > save Saving Environment to MMC... Writing to MMC(1)... done U-Boot > save Saving Environment to MMC... MMC partition switch failed U-Boot > save Saving Environment to MMC... Writing to MMC(1)... done U-Boot > save Saving Environment to MMC... MMC partition switch failed U-Boot > save Saving Environment to MMC... Writing to MMC(1)... done U-Boot > save Saving Environment to MMC... MMC partition switch failed This issue is caused by the incorrect usage of CONFIG_SYS_MMC_ENV_PART. CONFIG_SYS_MMC_ENV_PART should be used to specify the mmc partition that stores the environment variables. On some imx boards it is been incorrectly used to pass the partition of kernel and dtb files for the 'mmcpart' script variable. Remove the CONFIG_SYS_MMC_ENV_PART usage and configure the 'mmcpart' variable directly. Reported-by:
Jason Liu <r64343@freescale.com> Signed-off-by:
-
- Jun 04, 2013
-
-
Add minimal support (only boot from mmc device) for the Congatec Conga-QEVAl Evaluation Carrier Board with conga-Qmx6q (i.MX6 Quad processor) module. Signed-off-by:
Leo Sartre <lsartre@adeneo-embedded.com> Acked-by:
-
- Jun 03, 2013
-
-
Signed-off-by: -
Signed-off-by: -
The boot logo matching is now done in following way: - use LOGO_BMP if it is set, or - use $(BOARD).bmp if it exists in tools/logos, or - use $(VENDOR).bmp if it exists in tools/logos, or - use denx.bmp otherwise. Signed-off-by:
Wolfgang Denk <wd@denx.de>
-
The number of gpio signal is packed inside CONFIG_SF_DEFAULT_CS macro (shifted and or'ed with chip select), so it's incorrect to pass that macro directly as an argument to gpio_direction_output() call. Also, SPI driver sets the direction and initial value of a gpio, used as a chip select signal, before any actual activity happens on the bus. So, it is safe to just remove the gpio_direction_output call, that works incorrectly, thus making no effect, anyway. Signed-off-by:
Andrew Gabbasov <andrew_gabbasov@mentor.com> Tested-by:
Robert Winkler <robert.winkler@boundarydevices.com> Acked-by:
Dirk Behme <dirk.behme@de.bosch.com>
-
There are 3 IO expanders on the mx6qsabreauto all reset by the same GPIO, just set it to high to use the IO. Signed-off-by:
Renato Frias <b13784@freescale.com> Acked-by:
-
Add i2c2 and 3 to mx6qsabreauto board, i2c3 is multiplexed use gpio to set steering. Signed-off-by:
-
When the mx6slevk board support was added in U-boot there was no device tree support for mx6sl, so only a FSL 3.0.35 was tested at that time. Now that mx6slevk support is available we can boot a device tree kernel, by adjusting CONFIG_LOADADDR into a proper location, so that a non-dt and a dt kernels can be booted. Signed-off-by: -
The vectoring table has to be placed at 0x0, but U-Boot on MX23/MX28 starts from RAM, so the vectoring table at 0x0 is not present. Craft code that will be placed at 0x0 and will redirect interrupt vectoring to proper location of the U-Boot in RAM. Signed-off-by:
Marek Vasut <marex@denx.de> CC: Stefano Babic <sbabic@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com> Tested-by:
-
VF610TWR is a board based on Vybrid VF610 SoC. This patch adds basic support for Vybrid VF610TWR board. Signed-off-by:
Alison Wang <b18965@freescale.com> Signed-off-by:
Jason Jin <Jason.jin@freescale.com> Signed-off-by:
TsiChung Liew <tsicliew@gmail.com> Reviewed-by:
Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
-
This patch adds Vybrid VF610 to mxc_ocotp document. Signed-off-by:
-
This patch adds lpuart support for Vybrid VF610 platform. Signed-off-by:
-
This patch adds watchdog support for Vybrid VF610 platform. Signed-off-by: -
This patch adds FEC support for Vybrid VF610 platform. In function fec_open(), RCR register is only set as RGMII mode. But RCR register should be set as RMII mode for VF610 platform. This configuration is already done in fec_reg_setup(), so this piece of code could just leave untouched the FEC_RCNTRL_RGMII / FEC_RCNTRL_RMII / FEC_RCNTRL_MII_MODE bits. Signed-off-by:
-
This patch adds generic codes to support Freescale's Vybrid VF610 CPU. It aligns Vybrid VF610 platform with i.MX platform. As there are some differences between VF610 and i.MX platforms, the specific codes are in the arch/arm/cpu/armv7/vf610 directory. Signed-off-by:
-
This patch adds the IOMUX support for Vybrid VF610 platform. There is a little difference for IOMUXC module between VF610 and i.MX platform, the muxmode and pad configuration share one 32bit register on VF610, but they are two independent registers on I.MX platform. A CONFIG_IOMUX_SHARE_CONFIG_REG was introduced to fit this difference. Signed-off-by:
-
- May 16, 2013
-
-
Fix typo in wandboard README file. Signed-off-by:Luka Perkov <luka@openwrt.org>
-
Currently the mxsfb driver takes the display timings from the 'videomode' environment variable. Provide an example on how to set 'videomode' for using splash screen on mx23evk and mx28vk boards. Signed-off-by:
-
Enable display support. Signed-off-by: -
Enable display support. Signed-off-by: -
Signed-off-by:
-
- May 11, 2013
-
-
Albert ARIBAUD authored
-
Albert ARIBAUD authored
The manual resolution in commit ec7023db wrongly removed functions nand_init and nand_deselect from file drivers/mtd/nand/mxc_nand_spl.c. Revert this removal. Signed-off-by:
Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by:
-
Albert ARIBAUD authored
Conflicts: drivers/mtd/nand/mxc_nand_spl.c include/configs/m28evk.h
-
- May 10, 2013
-
-
Albert ARIBAUD authored
-
SRICHARAN R authored
The boot parameters passed from SPL to UBOOT must be saved as a part of uboot's gd data as early as possible, before we will inadvertently overwrite it. So adding a arch_cpu_init for the required Socs to save it. Signed-off-by:
Sricharan R <r.sricharan@ti.com> [trini: Add igep0033 hunk] Signed-off-by:
Tom Rini <trini@ti.com>
-
SRICHARAN R authored
The boot parameters are read from individual variables assigned for each of them. This been corrected and now they are stored as a part of the global data 'gd' structure. So read them from 'gd' instead. Signed-off-by:
-
SRICHARAN R authored
Currently save_boot_params saves the boot parameters passed from romcode. But this is not stored in a writable location consistently. So the current code would not work for a 'XIP' boot. Change this by saving the boot parameters in 'gd' which is always writable. Also add a 'C' function instead of an assembly code that is more readable. Signed-off-by: -
SRICHARAN R authored
These defines are same across OMAP4/5. So move them to omap_common.h. This is required for the patches that follow. Signed-off-by:
-
