- Aug 14, 2015
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Simon Glass authored
Set up interrupts correctly so that Linux can use all devices. Use savedefconfig to regenerate the defconfig file. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Simon Glass authored
At present we have a simple assignment to gd. With some archs this is implemented as a register or through some other means; a simple assignment does not suit in all cases. Change this to a function and add documentation to describe how this all works. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
York Sun <yorksun@freescale.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Simon Glass authored
Some archs like to have larger alignment for their global data. Use 16 bytes which suits all current archs. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Simon Glass authored
These functions allow iteration through all PCI devices including bridges. The children of each PCI bus are returned in turn. This can be useful for configuring, checking or enumerating all the devices. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Simon Glass authored
At present there are no PCI functions which allow access to PCI configuration using a struct udevice. This is a sad situation for driver model as it makes use of PCI harder. Add these functions. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com>
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Andrew Bradford authored
Allow for configuration of FSP UPD from the device tree which will override any settings which the FSP was built with itself. Modify the MinnowMax and BayleyBay boards to transfer sensible UPD settings from the Intel FSPv4 Gold release to the respective dts files, with the condition that the memory-down parameters for MinnowMax are also used. Signed-off-by:
Andrew Bradford <andrew.bradford@kodakalaris.com> Reviewed-by:
Bin Meng <bmeng.cn@gmail.com> Tested-by:
Bin Meng <bmeng.cn@gmail.com> Removed fsp,mrc-debug-msg and fsp,enable-xhci for minnowmax, bayleybay Fixed lines >80col Signed-off-by:
Simon Glass <sjg@chromium.org>
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Bin Meng authored
The BayTrail SoC has 4 different PCI devices IDs regarding to IDE and AHCI. Add these IDs in pci_ids.h and also add the other SATA ID in the Bayley Bay and MinnowMax board configuration header. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com>
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Bin Meng authored
bd->bi_dram[] has both start address and size defined as 32-bit, which is not the case on some platforms where >=4GiB memory bank is used. Change them to support such memory banks. Signed-off-by:
Bin Meng <bmeng.cn@gmail.com>
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- Aug 13, 2015
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Stephen Warren authored
Represent all available RAM in either one or two banks. The first bank describes any RAM below 4GB. The second bank describes any RAM above 4GB. This split is driven by the following requirements: - The NVIDIA L4T kernel requires separate entries in the DT /memory/reg property for memory below and above the 4GB boundary. The layout of that DT property is directly driven by the entries in the U-Boot bank array. - On systems with RAM beyond a physical address of 4GB, the potential existence of a carve-out at the end of RAM below 4GB can only be represented using multiple banks, since usable RAM is not contiguous. While making this change, add a lot more comments re: how and why RAM is represented in banks, and implement a few more "semantic" functions that define (and perhaps later detect at run-time) the size of any carve-out. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Stephen Warren authored
The new value is the most likely value where the kernel wants to end up at run-time. Selecting this value as the load address likely avoids the need to copy the kernel image from the actual load address to the desired load address. Note that this isn't guaranteed since the kernel may wish to run at an arbitrary location. In that case, U-Boot will still relocate the image according to its wishes; this change is a performance optimization, not a hard-coding of the final image location. Signed-off-by:
Stephen Warren <swarren@nvidia.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Marcel Ziswiler authored
Various clean-ups either in comments, order or spacing without any functional impact: - Add some comments in the device trees resp. reorder some parameters for consistency across all our modules. - Sort some include files alphabetically (while leaving common.h on top of course). - Streamline some comments in the configuration files and fix the spacing from using spaces to tabs. Signed-off-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Max Krummenacher authored
Enable CONFIG_IP_DEFRAG and set CONFIG_TFTP_BLOCKSIZE to 16384. This increases the tftp download speed considerably. While at it enable CONFIG_TFTP_TSIZE which limits the progress bar to fifty '#' independent of the downloaded file size. Signed-off-by:
Max Krummenacher <max.krummenacher@toradex.com> Signed-off-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Marcel Ziswiler authored
Now as all is in place actually enable UBI/UBIFS support to be able to boot the Linux kernel and root file system from NAND. Signed-off-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Marcel Ziswiler authored
Enable mtdparts aka dynamic MTD partition support. Signed-off-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Acked-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Marcel Ziswiler authored
Add I2C support in order to subsequently allow disabling the PMIC sleep mode on low supply voltage. Signed-off-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Acked-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Marcel Ziswiler authored
Add LCD display support defaulting to VESA VGA resolution. Different resolutions configurable via device tree. Signed-off-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Acked-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Marcel Ziswiler authored
Allow detecting whether or not U-Boot was launched through the recovery mode of the resp. NVIDIA SoC. Make use of a board specific arch_misc_init() and enable the same via CONFIG_ARCH_MISC_INIT configuration option. Signed-off-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Marcel Ziswiler authored
Allow for optional custom USB gadget manufacturer/product/vendor IDs/strings to be specified. Signed-off-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Reviewed-by:
Simon Glass <sjg@chromium.org> Acked-by:
Stephen Warren <swarren@nvidia.com> Signed-off-by:
Tom Warren <twarren@nvidia.com>
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Marcel Ziswiler authored
Remove spurious new line in configuration file. Signed-off-by:
Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-by:
Marek Vasut <marex@denx.de> Acked-by:
Marek Vasut <marex@denx.de>
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Vitaly Andrianov authored
9MB reserved for initrd is not enough for default ramfs used for keystone devices, which is ~33MB. This patch increases the size up to 80MB. Signed-off-by:
Vitaly Andrianov <vitalya@ti.com>
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Vitaly Andrianov authored
This patch set the correct initrd address to much rdaddr, which used at get_fs_ramfs commad. Fixes: 3e97f0b63c8e ("configs: ti_armv7_keystone2: switch addresses to generic addresses") Signed-off-by:
Vitaly Andrianov <vitalya@ti.com>
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Nikita Kiryanov authored
Add option to set shell prompt string from menuconfig and migrate boards globally. The migration is done as follows: - Boards that explicitly and unconditionally set CONFIG_SYS_PROMPT had the entry moved to their defconfig files. - Boards that defined some kind of #ifdef logic which selects the CONFIG_SYS_PROMPT (for example qemu-mips) got an #undef CONFIG_SYS_PROMPT right before the #ifdef logic and were left alone. - This change forces CONFIG_SYS_PROMPT to be a per board decision, and thus CONFIG_SYS_PROMPT was removed from all <soc>_common.h and <arch>_common.h files. This results in a streamlined default value across platforms, and includes the following files: spear-common, sunxi-common, mv-common, ti_armv7_common, tegra-common, at91-sama5_common, and zynq-common. - Boards that relied on <arch/soc>_common.h values of CONFIG_SYS_PROMPT were not updated in their respective defconfig files under the assumption that since they did not explicitly define a value, they're fine with whatever the default is. - On the other hand, boards that relied on a value defined in some <boards>_common.h file such as woodburn_common, rpi-common, bur_am335x_common, ls2085a_common, siemens_am33x_common, and omap3_evm_common, had their values moved to the respective defconfig files. - The define V_PROMPT was removed, since it is not used anywhere except for assigning a value for CONFIG_SYS_PROMPT. Cc: Tom Rini <trini@konsulko.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il> [trini: Add spring, sniper, smartweb to conversion] Signed-off-by:
Tom Rini <trini@konsulko.com>
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Tom Rini authored
- Import various DT files for DRA7 / DR72x / dra72-evm from Linux Kernel v4.1 - Add config file for this board, enable DM and DM_GPIO Cc: Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
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Nikita Kiryanov authored
Add initial support for CM-T43, an AM437x based SoM. This support includes: serial, MMC/eMMC, NAND, USB, ETH, I2C, GPIO, DRAM detection. Cc: Tom Rini <trini@konsulko.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by:
Nikita Kiryanov <nikita@compulab.co.il>
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Peter Griffin authored
HiKey is the first 96boards consumer edition compliant board. It features a hi6220 SoC which has eight ARM A53 cpu's. This initial port adds support for: - 1) Serial 2) eMMC / SD card 3) USB 4) GPIO It has been tested with Arm Trusted Firmware running u-boot as the BL33 executable. Notes: eMMC has been tested with basic reading of eMMC partition into DDR. I have not tested writing / erasing. Due to lack of clock control it won't be running in the most performant high speed mode. SD card slot has been tested for reading and booting kernels into DDR. It is also currently configured to save the u-boot environment to the SD card. USB has been tested with ASIX networking adapter to tftpboot kernels into DDR. On v2015.07-rc2 dhcp now works, and also USB mass storage are correctly enumerated. GPIO has been tested using gpio toggle GPIO4_1-3 to flash the LEDs. Basic SoC datasheet can be found here: - https://github.com/96boards/documentation/blob/master/hikey/ Hi6220V100_Multi-Mode_Application_Processor_Function_Description.pdf Board schematic can be found here: - https://github.com/96boards/documentation/blob/master/hikey/ 96Boards-Hikey-Rev-A1.pdf Signed-off-by:
Peter Griffin <peter.griffin@linaro.org>
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Peter Griffin authored
This adds a simple pmic driver for the hi6553 pmic which is used in conjunction with the hi6220 SoC on the hikey board. Eventually this driver will be updated to be a proper UCLASS PMIC driver which can parse the voltages direct from device tree. Signed-off-by:
Peter Griffin <peter.griffin@linaro.org>
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Lokesh Vutla authored
Add print_cpuinfo() function and enable CONFIG_DISPLAY_CPUINFO for keystone platforms, so that cpu info can be displayed during boot. Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Vitaly Andrianov <vitalya@ti.com> Signed-off-by:
Lokesh Vutla <lokeshvutla@ti.com>
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Linus Walleij authored
This switches the Integrator boards over to using the device model for its serial ports. Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by:
Linus Walleij <linus.walleij@linaro.org>
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Ruchika Gupta authored
gpio.h - Added missing copyright in few files. rsa-mod-exp.h - Corrected copyright in the file. fsl_sec.h - Added missing license in files drivers/crypto/fsl/Makefile - Removed the incomplete GPLv2 license and replaced it with GPLv2+ license Signed-off-by:
Ruchika Gupta <ruchika.gupta@freescale.com>
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Stefano Babic authored
Signed-off-by:
Stefano Babic <sbabic@denx.de> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Stefano Babic authored
Signed-off-by:
Stefano Babic <sbabic@denx.de> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Stefano Babic authored
mcx was not updated according to changes in NAND driver. Signed-off-by:
Stefano Babic <sbabic@denx.de> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Codrin Ciubotariu authored
The new bitfield value must not be higher than its mask. Signed-off-by:
Codrin Ciubotariu <codrin.ciubotariu@freescale.com> Reviewed-by:
Joe Hershberger <joe.hershberger@ni.com>
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Alexander Stein authored
Now that mailbox driver supports cache flush and invalidation, we can enable dcache. Signed-off-by:
Alexander Stein <alexanders83@web.de> Acked-by:
Stephen Warren <swarren@wwwdotorg.org> Tested-by:
Stephen Warren <swarren@wwwdotorg.org>
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Alexander Stein authored
The cacheline is always 32 bytes for arm1176 CPUs, so define it at board config level for cache handling code. The ARM Cortex-A7 has a dcache line size of 64 bytes. Signed-off-by:
Alexander Stein <alexanders83@web.de> Acked-by:
Stephen Warren <swarren@wwwdotorg.org> Tested-by:
Stephen Warren <swarren@wwwdotorg.org>
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Paul Kocialkowski authored
This adds support for the fastboot USB gadget, including flashing to the internal MMC and reboot to bootloader or not. Signed-off-by:
Paul Kocialkowski <contact@paulk.fr> Reviewed-by:
Tom Rini <trini@konsulko.com> [trini: Update to use Kconfig for MUSB] Signed-off-by:
Tom Rini <trini@konsulko.com>
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Paul Kocialkowski authored
Now that the serial number is correctly defined, we can pass it to the kernel using the (legacy) ATAG method. It will be automatically passed via device-tree when enabled. Signed-off-by:
Paul Kocialkowski <contact@paulk.fr> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Paul Kocialkowski authored
This adds support for the omap3 reboot mode mechanism and exports the reboot mode via an environment variable, that is used in the boot command to make it possible to boot from the recovery partition. Signed-off-by:
Paul Kocialkowski <contact@paulk.fr> Reviewed-by:
Tom Rini <trini@konsulko.com>
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Paul Kocialkowski authored
The LG Optimus Black (P970) codename sniper is a smartphone that was designed and manufactured by LG Electronics (LGE) and released back in 2011. It is using an OMAP3630 SoC GP version, which allows running U-Boot and the U-Boot SPL from the ground up. This port is aimed at running an Android version such as Replicant, the fully free Android distribution. However, support for upstream Linux with device-tree and common GNU/Linux distros boot commands could be added in the future. For more information about the journey to freeing this device, please read the series of blog posts at: http://code.paulk.fr/article20/a-hacker-s-journey-freeing-a-phone-from-the-ground-up-first-part Signed-off-by:
Paul Kocialkowski <contact@paulk.fr> Reviewed-by:
Tom Rini <trini@konsulko.com> [trini: Add CONFIG_OF_SUPPORT] Signed-off-by:
Tom Rini <trini@konsulko.com>
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Paul Kocialkowski authored
This allows scanning the twl4030 keypad, storing the result in a 64-byte long matrix with the twl4030_keypad_scan function. Detecting a key at a given column and row is made easier with the twl4030_keypad_key function. Signed-off-by:
Paul Kocialkowski <contact@paulk.fr> Reviewed-by:
Tom Rini <trini@konsulko.com>
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