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Alexander Arndt
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Andreas Findeklee afindeklee
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Annette Kobou akobou
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Armin Mück amueck
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Daniel Ehrler dehrler
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Dieter Scheufele dscheufele
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Dietmar Kolbus dkolbus
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Dominik Wurster Wurster
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Julian Bauknecht jbauknecht
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Maximilian Adducchio Maximilian
- Feb 05, 2021
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Lionel Debieve authored
Use plat_try_next_boot_source() to look for a backup partition if available. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I3e3a3ee42c81d0195cad16432754ffa3e9f50e3f Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/159358 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
Enable TRUSTED_BOARD_BOOT. This change removes calls to stm32mp_check_header() and stm32mp_auth_image() when boot images are loaded since images are now verified from the authentication framework. Change-Id: Iec5b645e1581543c99ae59bdb4dd033c577f2295 Signed-off-by:
Nicolas Toromanoff <nicolas.toromanoff@st.com> Signed-off-by:
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- Jan 13, 2021
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Nicolas Le Bayon authored
Replace hard-coded regulator names by stm32mp_get_cpu_supply_name() platform service which gets CPU regulator name from DT and finds its related supply name. Change-Id: I8a0ed4cbb9c4df729ecda95220a24b9c2f429d0f Signed-off-by:Nicolas Le Bayon <nicolas.le.bayon@st.com>
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Nicolas Le Bayon authored
Define DDR Self Refresh (SR) mode read/set/save/restore API functions. At the end of DDR initialization in BL2, switch SR mode to the one indicated by DDR updated registers. Save mode at BL32 init. When entering in cstop/cstandby, switch to SSR (Software). When exiting, go back to the saved mode. Change-Id: Iadd795d20fdea2d7be30c1ba6f02eb172e33f4b1 Signed-off-by: -
Nicolas Le Bayon authored
Remove unused stm32mp_ddr_supports_ssr_asr(), since this support is enabled by DDR settings defined in DT. Change-Id: I1759e2d6009539e2dfcaa1c4100da72368db8aa4 Signed-off-by:
Etienne CARRIERE <etienne.carriere@st.com>
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Etienne Carriere authored
Change-Id: I0816efd1fa43e4982e0d6ccaf0051835abaebac5 Signed-off-by: -
Yann Gautier authored
This was previously done in ddr_standby_sr_entry(). It is now done as a separate function. This will ease the DDR Self-Refresh entry for platforms having monitor in DDR. Change-Id: I69ccf0f33d20584579626b973a4295ede351a803 Signed-off-by:
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Gabriel Fernandez authored
Don't switch to MPUDIV/PLL1P in suspend/resume mode. Non-secure is in charge of requesting MPU lowest OPP when suspending. Change-Id: Iad47122c25d6f03247b7754a77e8d415c3720850 Signed-off-by:Gabriel Fernandez <gabriel.fernandez@st.com>
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Pascal Paillet authored
Allow to configure the retram state in standby-ddr-sr from the device-tree. This is realized by introducing a new binding property to stm32mp1 pwr node: st,retram-enabled-in-standby-ddr-sr. Signed-off-by:Pascal Paillet <p.paillet@st.com> Change-Id: Iacd15321bce06e071a82bdfa05e4b63c3bf8c4fa
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Lionel Debieve authored
Adding the MCU hold boot management through a SCMI dedicated reset domain. Remove the associated RCC SMC service. Minor: Fix the panic when trying to checking access to avoid non-secure world panic trigger. Signed-off-by: -
Yann Gautier authored
Change-Id: I32ed528a8eeca2ae61aa0406e4c4578df61190ab Signed-off-by:
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Yann Gautier authored
Use the newly created function stm32mp_boot_action_is_wakeup_from_standby() to check if the boot is a return from standby. Change-Id: Idf16978ed43804c6418dbee4f57f1695d43d1b59 Signed-off-by: -
Yann Gautier authored
Some parameters from BootROM boot context can be required after boot. To save space in SYSRAM, this context can be overwritten during images load sequence. The needed information is then saved in local variables. Another helper is also created to check if the boot is a return from STANDBY or CSTANDBY. Change-Id: I5e1ad4630ccf78480f415a0a83939005ae67729e Signed-off-by: -
Yann Gautier authored
Device Tree address is now a parameter for dt_open_and_check() function. This will allow better flexibility when introducing PIE. The fdt pointer is now only assigned if the given address holds a valid device tree file. This allows removing the fdt_checked variable, as we now check fdt is not null. Change-Id: I04cbb2fc05c9c711ae1c77d56368dbeb6dd4b01a Signed-off-by:
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Yann Gautier authored
This mapping is done to compute the DDR size and make some access tests. The TZC400 configuration is also updated to reflect this. Change-Id: Ic5ec614b218f733796feeab1cdc425d28cc7c103 Signed-off-by:
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Yann Gautier authored
Add new static functions to factorize code in stm32mp1_security.c. New functions are also created and exported to easily configure TZC400. Change-Id: Ifa5a1aaf7c56c25dba9a0ab8e985496d7cb06990 Signed-off-by: -
Lionel Debieve authored
Enable all the tampers around monitoring control. Update also the platform max value to 6 internal tampers. Signed-off-by: -
Lionel Debieve authored
In case of chip closed, the debug must not be opened. It impacts the chip id and chip version. In case of chip closed, a default chip version is used to avoid opening the debugger for software access. Signed-off-by:
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Arnaud Pouliquen authored
2 issues fixed: - context is not saved if due to MCU PDDS, STANDBY is not reached, but only CSTOP - PLLs should be restarted only if they are not enabled. Change-Id: I4f4ec8881d8a2b8066e79b4814acc2f6e2ea71e8 Signed-off-by:
Arnaud Pouliquen <arnaud.pouliquen@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/158551 Reviewed-by:
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Nicolas Le Bayon authored
configure_pmic() is in charge of setting voltages and enabling regulators if they are defined in DT with "boot-on" or "always-on" properties. This is done one after the other. It has to be executed after DDR initialization, which setups its own regulator rampings, with specified order and delays. Change-Id: If714d471bc78e292b9079f56f7a7b9982623573f Signed-off-by:
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Nicolas Le Bayon authored
As LpDDR2, enable automatic and software self refresh feature for LpDDR3. Change-Id: I93732cee4974cc7863b1aa2c9711cc52df180859 Signed-off-by:
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Etienne Carriere authored
This change makes SYSCFG clock being disabled when IO compensation is disabled when entering system low power state. SYSCFG clock is non-secure as its related SoC interface register can be read/write by non-secure world. A consequence is that the clock is never disabled by stm32mp1 clock driver. Replace functions stm32mp1_clk_enable_non_secure() and stm32mp1_clk_disable_non_secure(), used only for this SYSCFG clock control, with stm32mp1_clk_force_enable() and stm32mp1_clk_force_disable(). These functions gate the target clock without considering the software reference counting. Change-Id: I0d0a6ea3c598996fe475fc23613163df07631728 Signed-off-by: -
Lionel Debieve authored
Add a banner that inform user that debug is enabled on a secure chip. Signed-off-by: -
Lionel Debieve authored
In case of stop mode, PLL3, PLL4 are stopped and reset to default value. They must be saved and restarted, MSS clock selection must be also restored. Signed-off-by: -
Etienne Carriere authored
When RCC[TZEN] is enabled secure world needs to save the secure and non-secure clock configuration settings and restore them when resuming. Function stm32mp1_clk_mpu_suspend()/stm32mp1_clk_mpu_resume() are made local and renamed clk_mpu_suspend()/clk_mpu_resume(). The overall clock configuration is saved with stm32mp1_clock_suspend() and restored with stm32mp1_clock_resume(). Change-Id: I1fc0c693c59ffe972961c2b23f30a39a520f3aaa Signed-off-by: -
Etienne Carriere authored
When TF-A BL2 boots an OP-TEE, the OP-TEE may be a old version that provides a V1 PM context. In such case, precomputed PLL1 settings are not available in the wakeup context and shall be recomputed. With this stm32_get_pll1_settings_from_context() has a return value that states if the PLL1 settings were restored. Change-Id: Ia561e4ee42a788bc14a05e583650c5eb050131fd Signed-off-by:
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Yann Gautier authored
In case of USB boot mode, SRAM is mapped and it requires a new translation table. Mandatory for 512MB boards. Signed-off-by:
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Nicolas Le Bayon authored
BSEC services should return SMC error codes as other IDs (defined in stm32mp1_smc.h) and not BSEC driver ones. So that non secure caller is able to treat them correctly. In global SMC handler, unknown ID should also return a value from this definition list, and not the generic one, which seems not well adapted for our needs. Change-Id: Ib6fd3866a748cefad1d13d48f7be38241621023e Signed-off-by: -
Lionel Debieve authored
In case of part number not found (number is in fuse map), the software must panic in all cases. Same behaviour will occur when reading the cpu_package. Signed-off-by:
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Lionel Debieve authored
STM32MP15xA and STM32MP15xD chip part number doesn't support the secure boot. All functions linked to secure boot must not be used and signed binaries are not allowed on such chip. Signed-off-by:
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Yann Gautier authored
The shutdown command can trigger a standby with DDR off, depending on the DT configuration. In this case, the cold boot code must be done. The wakeup_standby variable is then set to true if a return address is set in the backup register. This change avoids a panic in initialize_clock when pressing wake-up button and the system was in STANDBY with DDR off. Change-Id: I2b146340166bb077d8362818f9bcd8dedc23ee93 Signed-off-by:
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Nicolas Le Bayon authored
Add a new BSEC service to force an OTP to be permanently write-locked and not programmable. Note that the corresponding status register is readable from non secure world. Change-Id: Ic927db855f4193bb3083fa409b7be34818a21f34 Signed-off-by: -
Nicolas Le Bayon authored
Self Refresh (SR) is a significant power saving opportunity for SDRAM. During SR, DLL's in DDRPHYC can be bypassed,and the DDRCTRL clocks can be stopped. Automatic SR (ASR) triggers on when there are no read/write for a predefined time. This fits with the need in running mode. Software SR (SSR) is controlled by software operation. Switch to software self refresh when entering in CSTOP, and go back to automatic self refresh when exiting from CSTOP. Change-Id: I3ce91d2124b63491cc88eb39de4c643e59bd135c Signed-off-by:
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Nicolas Le Bayon authored
Add a platform function to know if Software/Automatic Self-Refresh is supported. Change-Id: Ie20dd21c25ef3dd4c56bb9fe10c7e9b14b190134 Signed-off-by:
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Yann Gautier authored
If the regulator-always-on property is set for one of the regulators, then the always_on field of the regu struct is set to true. Change-Id: Ia6231bd187cd5ee8436bd57f810a29903129a474 Signed-off-by:
Antonio Maria BORNEO <antonio.borneo@st.com> Reviewed-by:
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Lionel Debieve authored
When coming back from standby, the backup value must be restored with the sleep time. Rework the function to add a backup counter value to be added to the sleep time and move stgen functions to stm32mp generic code. Signed-off-by: -
Yann Gautier authored
TEED partition size increased to 512KB for OP-TEE v3.7.0. The next partition TEEX is then shifted by 256KB. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com> Change-Id: Ide83faecac73166eaf778462e27443c9a551e037 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/151912 Reviewed-by:
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Yann Gautier authored
This function should be defined for all ST platforms. Change-Id: I9b636d3b5e19d31c9b960f5349e1f252cc74d764 Signed-off-by:
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Lionel Debieve authored
Alignment with the new mapping for NOR device. Signed-off-by:
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Nicolas Le Bayon authored
A new RCC_OPP function ID has been added to the SMC list. STM32_SMC_RCC_OPP_SET and STM32_SMC_RCC_OPP_ROUND operate on OPP table with the DT reference, and eventually act on RCC IP. Change-Id: I07c8f4cbf3c359759032d6e45c342cc4cbdb54bd Signed-off-by:
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