Convert the Samsung SoC (S3C24xx, S3C64xx, S5Pv210, Exynos) pin
controller bindings to DT schema format.  Parts of description and DTS
example was copied from existing sources, so keep the license as
GPL-2.0-only.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220111201722.327219-18-krzysztof.kozlowski@canonical.com

For a single pinctrl mode, it is not necessary to define pinctrl
properties as the tools always allow pinctrl properties.

Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20220119015325.2438277-1-robh@kernel.org

On mt8195, the pinctrl node has pinctrl groups to group pin
configurations by users' need. In each pinctrl group, it has
subnode(s) to list pins needed and pin configurations. By supporting
multiple subnodes, we can configure different pin characteristics
(driving/pull-up/pull-down/etc.) in a pinctrl group.

Update pinctrl-mt8195.yaml to add subnode in pinctrl groups and an
example to illustrate the usage.

Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com>
Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211220121825.6446-4-tinghan.shen@mediatek.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add device tree binding Documentation details for Qualcomm SDX65
pinctrl driver.

Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/ff9abf953c274a1e34f59114642f67ecf02acb6f.1639696427.git.quic_vamslank@quicinc.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add bindings for the GPIO/pin controller on the JH7100 RISC-V SoC by
StarFive Ltd. This is a test chip for their upcoming JH7110 SoC.

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>

This new SoC uses the same pinctrl hardware, so just add a new per-SoC
compatible.

Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>

Add Device Tree bindings documentation and an entry in MAINTAINERS file
for Intel Thunder Bay SoC's pin controller.

Signed-off-by: Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
Link: https://lore.kernel.org/r/20211201072626.19599-2-lakshmi.sowjanya.d@intel.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add device tree binding Documentation details for Qualcomm SM8450
TLMM device

Signed-off-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211201072434.3968768-2-vkoul@kernel.org


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Also fix some examples to avoid warnings like:
brcm,ns-pinmux.example.dt.yaml: pin-controller@1800c1c0: $nodename:0: 'pin-controller@1800c1c0' does not match '^pinctrl|pinmux@[0-9a-f]+$'

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211202063216.24439-1-zajec5@gmail.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This will bind to the PMGR pwrstate nodes that control power/clock
gating to SoC blocks. The pinctrl driver doesn't do runtime-pm yet, so
initially this will just keep the domain on permanently.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Hector Martin <marcan@marcan.st>

This helps validating DTS and writing YAML files.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211110165720.30242-1-zajec5@gmail.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add i.MXRT1050 pinctrl binding doc

Cc: Giulio Benetti <giulio.benetti@benettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211125211443.1150135-3-Mr.Bossman075@gmail.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This reverts commit 3fe59cc4.
The bindings were not properly reviewed and were also
causing errors in the automatic checkers once applied.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Suggested-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com>
Signed-off-by: Dominik Kobinski <dominikkobinski314@gmail.com>
Link: https://lore.kernel.org/r/20211125215626.62447-1-dominikkobinski314@gmail.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

In arch/arm/boot/dts/uniphier-pinctrl.dtsi, there are child nodes of
pinctrl that defines pinmux and pincfg, however, there are no rules about
that in dt-bindings.

'make dtbs_check' results an error with the following message:

   pinctrl: 'ain1', 'ain2', 'ainiec1', 'aout', 'aout1', 'aout2', ...
   ... 'usb2', 'usb3' do not match any of the regexes: 'pinctrl-[0-9]+'

To avoid the issue, add the rules of pinmux and pincfg in each child node
and grandchild node.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1636416699-21033-1-git-send-email-hayashi.kunihiko@socionext.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add compatible strings for pm2250 SPMI GPIO to documentation.

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Link: https://lore.kernel.org/r/1637076915-3280-2-git-send-email-loic.poulain@linaro.org


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add pmic-gpio compatible string for pm8019 pmic.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211112115342.17100-1-konrad.dybcio@somainline.org


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add device tree binding Documentation details for Qualcomm SDX65
pinctrl driver.

Signed-off-by: Vamsi Krishna Lanka <quic_vamslank@quicinc.com>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/06234768890dc7572226f23d432e5a69a4d5b305.1637048107.git.quic_vamslank@quicinc.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add documentation for the compatible designated for lan966x.

Signed-off-by: Kavyasree Kotagiri <kavyasree.kotagiri@microchip.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211118112548.14582-2-kavyasree.kotagiri@microchip.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Document compatible string for Exynos7885 SoC.

Signed-off-by: David Virag <virag.david003@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211031231511.46856-1-virag.david003@gmail.com


Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>

RZ/G2L SoC has two groups of pins, Group-A and Group-B. RZ/G2L SoC supports
configuring Output Impedance for Group-B pins (valid values 33/50/66/100).

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211110224622.16022-2-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

On RZ/G2L SoC for Group-B pins, output impedance can be configured. This
patch documents "output-impedance-ohms" property in pincfg-node.yaml so
that other platforms requiring such feature can make use of this property.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20211027134509.5036-2-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>

Not all @st.com email address are concerned, only people who have
a specific @foss.st.com email will see their entry updated.
For some people, who left the company, remove their email.

Cc: Alexandre Torgue <alexandre.torgue@foss.st.com>
Cc: Arnaud Pouliquen <arnaud.pouliquen@foss.st.com>
Cc: Fabien Dessenne <fabien.dessenne@foss.st.com>
Cc: Christophe Roullier <christophe.roullier@foss.st.com>
Cc: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Cc: Lionel Debieve <lionel.debieve@foss.st.com>
Cc: Amelie Delaunay <amelie.delaunay@foss.st.com>
Cc: Pierre-Yves MORDRET <pierre-yves.mordret@foss.st.com>
Cc: Ludovic Barre <ludovic.barre@foss.st.com>
Cc: Christophe Kerello <christophe.kerello@foss.st.com>
Cc: pascal Paillet <p.paillet@foss.st.com>
Cc: Erwan Le Ray <erwan.leray@foss.st.com>
Cc: Philippe CORNU <philippe.cornu@foss.st.com>
Cc: Yannick Fertre <yannick.fertre@foss.st.com>
Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com>
Cc: Olivier Moysan <olivier.moysan@foss.st.com>
Cc: Hugues Fruchet <hugues.fruchet@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Acked-By: Vinod Koul <vkoul@kernel.org>
Acked-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/r/20211110150144.18272-6-patrice.chotard@foss.st.com


Signed-off-by: Rob Herring <robh@kernel.org>

This property is used to describe the total number of pins on this
particular pinctrl hardware block.

Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211026175815.52703-4-joey.gouly@arm.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

The GPIO/pinctrl hardware can act as an interrupt-controller, so add
the #interrupt-cells property to the binding.

Signed-off-by: Joey Gouly <joey.gouly@arm.com>
Reviewed-by: Sven Peter <sven@svenpeter.dev>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211026175815.52703-3-joey.gouly@arm.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This updates bindings for MT7986 pinctrl driver. The
difference of pinctrl between mt7986a and mt7986b is that pin-41 to
pin-65 do not exist on mt7986b

Signed-off-by: Sam Shih <sam.shih@mediatek.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211022124036.5291-2-sam.shih@mediatek.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This describes the new binding which allows to call a reset driver from
the pinctrl-microchip-sgpio driver.

Signed-off-by: Horatiu Vultur <horatiu.vultur@microchip.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211018085754.1066056-2-horatiu.vultur@microchip.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Stop specifying individual interrupts properties. Use #interrupt-cells
instead as we are switching qcom,spmi-mpp and qcom,ssbi-mpp to
hierarchical IRQ setup.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20211008012524.481877-18-dmitry.baryshkov@linaro.org


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Convert Qualcomm PMIC MPP bindings from .txt to .yaml format.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20211008012524.481877-2-dmitry.baryshkov@linaro.org


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add pinctrl data for ExynosAuto v9 SoC.

- GPA0, GPA1: 10, External wake up interrupt
- GPQ0: 2, XbootLDO, Speedy PMIC I/F
- GPB0, GPB1, GPB2, GPB3: 29, I2S 7 CH
- GPF0, GPF1, GPF2, GPF3,GPF4, GPF5, GPF6, GPF8: 52, FSYS
- GPG0, GPG1, GPG2, GPG3: 25, GPIO x 24, SMPL_INT
- GPP0, GPP1, GPP2, GPP3, GPP4, GPP5: 48, USI 12 CH

Signed-off-by: Chanho Park <chanho61.park@samsung.com>
Link: https://lore.kernel.org/r/20211008091443.44625-2-chanho61.park@samsung.com


Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20211017171912.5044-1-krzysztof.kozlowski@canonical.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Convert rockchip,pinctrl.txt to YAML

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20211007144019.7461-1-jbx6244@gmail.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

There is no need to include CRU in example of this binding. It wasn't
complete / correct anyway. The proper binding can be find in the
mfd/brcm,cru.yaml .

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211008205938.29925-2-zajec5@gmail.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

This reverts commit 2ae80900.

My rework was unneeded & wrong. It replaced a clear & correct "reg"
property usage with a custom "offset" one.

Back then I didn't understand how to properly handle CRU block binding.
I heard / read about syscon and tried to use it in a totally invalid
way. That change also missed Rob's review (obviously).

Northstar's pin controller is a simple consistent hardware block that
can be cleanly mapped using a 0x24 long reg space.

Since the rework commit there wasn't any follow up modifying in-kernel
DTS files to use the new binding. Broadcom also isn't known to use that
bugged binding. There is close to zero chance this revert may actually
cause problems / regressions.

This commit is a simple revert. Example binding may (should) be updated
/ cleaned up but that can be handled separately.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20211008205938.29925-1-zajec5@gmail.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Update pinctrl binding document for UniPhier NX1 SoC.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Link: https://lore.kernel.org/r/1633518606-8298-3-git-send-email-hayashi.kunihiko@socionext.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add pmic-gpio compatible string for pm6350 pmic.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20211007212444.328034-5-luca@z3ntu.xyz


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

For supporting SI units in "bias-pull-down" & "bias-pull-up",
change pull up/down description
and add "mediatek,rsel_resistance_in_si_unit" description.

Signed-off-by: Zhiyong Tao <zhiyong.tao@mediatek.com>
Link: https://lore.kernel.org/r/20210924080632.28410-3-zhiyong.tao@mediatek.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add support for the pinconf DT property output-enable, output-disable
so that output can be enabled/disabled.

Signed-off-by: Subbaraman Narayanamurthy <quic_subbaram@quicinc.com>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/1631588246-4811-2-git-send-email-quic_subbaram@quicinc.com


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add device tree bindings for QCM2290 pinctrl.

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210923033224.29719-2-shawn.guo@linaro.org


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Add device tree binding Documentation details for Qualcomm SM6350
pinctrl driver.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20210923161450.15278-1-konrad.dybcio@somainline.org


Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

Document compatible string for Exynos850 SoC. Nothing else is changed,
as Exynos850 SoC uses already existing samsung pinctrl driver.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20210811114827.27322-2-semen.protsenko@linaro.org


Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>