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  1. Apr 13, 2015
  2. Apr 11, 2015
  3. Apr 10, 2015
  4. Apr 09, 2015
  5. Apr 08, 2015
    • Michal Simek's avatar
      ARM: zynq: Remove Jagan from list of maintainers · 385a08a6
      Michal Simek authored
      
      Email address is not longer valid that's why remove it.
      
      Signed-off-by: default avatarMichal Simek <michal.simek@xilinx.com>
      385a08a6
    • Masahiro Yamada's avatar
      ARM: zynq: disable CONFIG_SYS_MALLOC_F to fix MMC boot · 321f86e1
      Masahiro Yamada authored
      
      Since commit 326a6823 (malloc_f: enable SYS_MALLOC_F by default
      if DM is on), Zynq MMC boot hangs up after printing the following:
      
          U-Boot SPL 2015.04-rc5-00053-gadcc570 (Apr 08 2015 - 12:59:11)
          mmc boot
          reading system.dtb
      
      Prior to commit 326a6823, Zynq boards enabled CONFIG_DM, but
      not CONFIG_SYS_MALLOC_F.  That commit forcibly turned on
      CONFIG_SYS_MALLOC_F.  I have not figured out the root cause, but
      anyway it looks like CONFIG_SYS_MALLOC_F gave a bad impact on the
      Zynq MMC boot.
      
      We are planning to have the v2015.04 release in a few days.
      I know this is a defensive fixup, but what I can do now is to add
         # CONFIG_SYS_MALLOC_F is not set
      to every Zynq defconfig file to get back the original behavior.
      
      Tested on:
        - Zedboard
        - ZC706 board
      
      Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
      Tested-by: default avatarMichal Simek <michal.simek@xilinx.com>
      Cc: Simon Glass <sjg@chromium.org>
      321f86e1
    • Ulises Cardenas's avatar
      Fix mxc_hab documenation for DEK blob generation · f97d112e
      Ulises Cardenas authored and Stefano Babic's avatar Stefano Babic committed
      
      Include/fsl_sec.h defines sec_in and sec_out, according to the
      platform's endianess. Therefore, CONFIG_SYS_FSL_LE needs to be
      declared in the configuration file of the target, in order to use
      enable the DEK blob generation command. This requirement is not
      explicit in the README.mxc_hab.
      
      Signed-off-by: default avatarUlises Cardenas <Ulises.Cardenas@freescale.com>
      f97d112e
    • Fabio Estevam's avatar
      mx53loco: Disable printing cpuinfo · a80a65e9
      Fabio Estevam authored and Stefano Babic's avatar Stefano Babic committed
      
      Since commit 32df39c7 ("mx5: fix get_reset_cause") we have the following
      boot messages on a mx53qsb:
      
      U-Boot 2015.04-rc5-00029-gd68df02 (Apr 06 2015 - 11:15:39)
      
      CPU:   Freescale i.MX53 rev2.1 at 800 MHz
      Reset cause: POR
      Board: MX53 LOCO
      I2C:   ready
      DRAM:  1 GiB
      MMC:   FSL_SDHC: 0, FSL_SDHC: 1
      In:    serial
      Out:   serial
      Err:   serial
      CPU:   Freescale i.MX53 rev2.1 at 1000 MHz
      Reset cause: unknown reset
      Net:   FEC [PRIME]
      
      The CPU and Reset cause lines appear twice.
      
      Initially mx53 boots at 800MHz, then at a later point the PMIC is configured via
      I2C to raise the CPU voltage so that it can run at 1GHz.
      
      To avoid such misleading double printings, disable printing cpu info for now.
      
      Signed-off-by: default avatarFabio Estevam <fabio.estevam@freescale.com>
      Acked-by: default avatarJason Liu <r64343@freescale.com>
      a80a65e9
  6. Apr 07, 2015
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