- Apr 15, 2017
-
-
Simon Glass authored
Add support for toggling an LED into the uclass interface. This can be efficiently implemented by the driver. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Ziping Chen <techping.chan@gmail.com>
-
Simon Glass authored
It is useful to be able to read the LED as well as write it. Add this to the uclass and update the GPIO driver. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Ziping Chen <techping.chan@gmail.com>
-
Simon Glass authored
At present this is very simple, supporting only on and off. We want to also support toggling and blinking. As a first step, change the name of the main method and use an enum to indicate the state. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Ziping Chen <techping.chan@gmail.com>
-
Simon Glass authored
These structures are normally named with 'uc' instead of 'uclass'. Change this one for consistency. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Ziping Chen <techping.chan@gmail.com>
-
Simon Glass authored
There should be a blank line between each option. Add one before LED_GPIO. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Ziping Chen <techping.chan@gmail.com>
-
Simon Glass authored
Add some LEDs to the standard sandbox device tree. Signed-off-by:
Simon Glass <sjg@chromium.org> Reviewed-by:
Ziping Chen <techping.chan@gmail.com>
-
Jean-Jacques Hiblot authored
With DM_SCSI enabled, blk_create_devicef() is called with blkz = 0, leading to a divide-by-0 exception. scsi_detect_dev() can be used to get the required parameters (block size and number of blocks) from the drive before calling blk_create_devicef(). Signed-off-by:
Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
-
Jean-Jacques Hiblot authored
We might want to get information about the scsi device without initializing the partition. Signed-off-by:
Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
-
Jean-Jacques Hiblot authored
This is a cosmetic change. target and LUN have kind of the same role in this function. One of them was passed as a parameter and the other was embedded in a structure. For consistency, pass both of them as parameters. Signed-off-by:
Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com> Reviewed-by:
Simon Glass <sjg@chromium.org>
-
Jean-Jacques Hiblot authored
When CONFIG_DM_SCSI is defined, the SATA initialization will be implemented in the scsi-uclass driver. Signed-off-by:
Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
-
Mugunthan V N authored
All the clocks which has to be enabled has to be done in enable_basic_clocks(), so moving enable sata clock to common clocks enable function. Signed-off-by:
Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by:
Jean-Jacques Hiblot <jjhiblot@ti.com> Reviewed-by:
Tom Rini <trini@konsulko.com>
-
- Apr 14, 2017
-
-
Tom Rini authored
When writing out some of our results we may now have UTF-8 characters in there as well. Translate these to latin-1 and ignore any errors (as this is for diagnostic and given the githash anything else can be reconstructed by the user. Reviewed-by:
Simon Glass <sjg@chromium.org> Signed-off-by:
Tom Rini <trini@konsulko.com>
-
git://git.denx.de/u-boot-usbTom Rini authored
-
Troy Kisky authored
This fixes a regression caused by commit 07b2b78c dm: usb: Convert USB storage to use driver-model for block devs which caused part_init to be called when it was not previously. Without this patch, the following happens when a USB sd card reader is used. => usb start starting USB... USB0: Port not available. USB1: USB EHCI 1.00 scanning bus 1 for devices... 3 USB Device(s) found scanning usb for storage devices... Device NOT ready Request Sense returned 02 3A 00 ### ERROR ### Please RESET the board ### This happens because dev_desc->blksz is 0. Signed-off-by:
Troy Kisky <troy.kisky@boundarydevices.com>
-
Eddie Cai authored
We should invalidate the dcache before starting the DMA. In case there are any dirty lines from the DMA buffer in the cache, subsequent cache-line replacements may corrupt the buffer in memory while the DMA is still going on. Cache-line replacement can happen if the CPU tries to bring some other memory locations into the cache while the DMA is going on. Signed-off-by:
Eddie Cai <eddie.cai.linux@gmail.com> Reviewed-by:
Stefan Brüns <stefan.bruens@rwth-aachen.de>
-
Philipp Tomsich authored
Merely using dma_alloc_coherent does not ensure that there is no stale data left in the caches for the allocated DMA buffer (i.e. that the affected cacheline may still be dirty). The original code was doing the following (on AArch64, which translates a 'flush' into a 'clean + invalidate'): # during initialisation: 1. allocate buffers via memalign => buffers may still be modified (cached, dirty) # during interrupt processing 2. clean + invalidate buffers => may commit stale data from a modified cacheline 3. read from buffers This could lead to garbage info being written to buffers before reading them during even-processing. To make the event processing more robust, we use the following sequence for the cache-maintenance: # during initialisation: 1. allocate buffers via memalign 2. clean + invalidate buffers (we only need the 'invalidate' part, but dwc3_flush_cache() always performs a 'clean + invalidate') # during interrupt processing 3. read the buffers (we know these lines are not cached, due to the previous invalidation and no other code touching them in-between) 4. clean + invalidate buffers => writes back any modification we may have made during event processing and ensures that the lines are not in the cache the next time we enter interrupt processing Note that with the original sequence, we observe reproducible (depending on the cache state: i.e. running dhcp/usb start before will upset caches to get us around this) issues in the event processing (a fatal synchronous abort in dwc3_gadget_uboot_handle_interrupt on the first time interrupt handling is invoked) when running USB mass storage emulation on our RK3399-Q7 with data-caches on. Signed-off-by:
Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
-
Philipp Tomsich authored
The dwc3_flush_cache() call was declared and used inconsistently: * The declaration assumed 'int' for addresses (a potential issue when running in a LP64 memory model). * The invocation cast the address to 'long'. This change ensures that both the declaration and usage of this function consistently uses 'uintptr_t' for correct behaviour even when the allocated buffers (to be flushed) reside outside of the lower 32bits of memory. Signed-off-by:
Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
-
Felipe Balbi authored
Both these numbers are calculated in runtime and dynamically assigned to the device descriptor during bind(). Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
-
Felipe Balbi authored
We don't want to claim that we support a serial number string and later return nothing. Because of that, if g_dnl_serial is an empty string, let's skip setting iSerialNumber to a valid number. Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
-
Felipe Balbi authored
A USB String descriptor can be up to 255 characters long and it's not NULL terminated according to the USB spec. This means our MAX_STRING_SERIAL should be 256 (to cope with NULL terminator). Signed-off-by:
Felipe Balbi <felipe.balbi@linux.intel.com>
-
git://git.denx.de/u-boot-socfpgaTom Rini authored
-
git://git.denx.de/u-boot-mmcTom Rini authored
-
Kever Yang authored
Some board do not use the dwc2 internal VBUS_DRV signal, but use a gpio pin to enable the 5.0V VBUS power, add interface to enable the power in dwc2 driver. Signed-off-by:
Kever Yang <kever.yang@rock-chips.com> Signed-off-by:
Simon Glass <sjg@chromium.org>
-
Dalon Westergreen authored
This removes the default environment from the sr1500 header and instead uses the common environment provided in socfpga_common.h which now uses distro boot. This board has no upstream devicetree in the kernel source, so set to socfpga_cyclone5_sr1500.dtb. Signed-off-by:
Dalon Westergreen <dwesterg@gmail.com> Acked-by:
Marek Vasut <marex@denx.de> -- Changes in v2: - Remove unneeded CONFIG_BOOTFILE - set devicetree name to match socfpga_{fpga model}_{board model}.dts pattern
-
Dalon Westergreen authored
This removes the default environment from the socrates headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. Change default devicetree name to match devicetree name in upstream kernel source. Signed-off-by:
Dalon Westergreen <dwesterg@gmail.com> Acked-by:
Marek Vasut <marex@denx.de> -- Changes in v2: - Remove unneeded CONFIG_BOOTFILE
-
Dalon Westergreen authored
This removes the default environment from the SoCKit headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. Change default devicetree name to match devicetree name in upstream kernel source. Signed-off-by:
Dalon Westergreen <dwesterg@gmail.com> Acked-by:
Marek Vasut <marex@denx.de> -- Changes in v2: - Remove unneeded CONFIG_BOOTFILE
-
Dalon Westergreen authored
This removes the default environment from the de1 headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. This board does not have a devicetree in the upstream kernel source so set devicetree to socfpga_cyclone5_de1_soc.dtb. Signed-off-by:
Dalon Westergreen <dwesterg@gmail.com> Acked-by:
Marek Vasut <marex@denx.de> -- Changes in V2: - Remove unneeded CONFIG_BOOTFILE - set devicetree name to match socfpga_{fpga model}_{board model}.dts pattern
-
Dalon Westergreen authored
This removes the default environment from the C5 SoCDK headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. In addition to the above, add support to boot from the custom a2 type partition. Change default devicetree name to match devicetree name in upstream kernel source. Signed-off-by:
Dalon Westergreen <dwesterg@gmail.com> Acked-by:
Marek Vasut <marex@denx.de> -- Changes in v2: - Remove unneeded CONFIG_BOOTFILE
-
Dalon Westergreen authored
This removes the default environment from the A5 socdk headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. Add support to boot from the custom a2 type partition. Change default devicetree name to match devicetree name in upstream kernel source. Signed-off-by:
Dalon Westergreen <dwesterg@gmail.com> Acked-by:
Marek Vasut <marex@denx.de> -- Changes in v3: - Fix small typo in defconfig, missing "C" Changes in v2: - Remove unneeded CONFIG_BOOTFILE - Fix dtb name a5config test Signed-off-by:
Dalon Westergreen <dwesterg@gmail.com>
-
Dalon Westergreen authored
This removes the default environment from the de0 headers and instead uses the common environment provided in socfpga_common.h which now uses distro boot. In addition to the above, add support to boot from the custom a2 type partition Signed-off-by:
Dalon Westergreen <dwesterg@gmail.com> Acked-by:
Marek Vasut <marex@denx.de> -- Changes in v2: - Remove unneeded CONFIG_BOOTFILE
-
Dalon Westergreen authored
This adds a common environment and support for distro boot in the common socfpga header. Signed-off-by:
Dalon Westergreen <dwesterg@gmail.com> Acked-by:
Marek Vasut <marex@denx.de> -- Changes in v5: - Per Frank, to support OpenSuse the ENV must be after the GPT Changes in v4: - Move env back to being right after the MBR Changes in v3: - fix spacing between asterix - remove verify=n as a default setting Changes in v2: - Remove unneeded CONFIG_BOOTFILE and fdt_addr - cleanup spacing in MMC env size common Signed-off-by:
Dalon Westergreen <dwesterg@gmail.com>
-
Ley Foon Tan authored
Convert Altera DDR SDRAM driver to use Kconfig method. Enable ALTERA_SDRAM by default if it is on Gen5 target. Arria 10 will have different driver. Signed-off-by:
Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com>
-
Ley Foon Tan authored
Add compatible strings for Intel Arria 10 SoCFPGA device. Signed-off-by:
Tien Fong Chee <tien.fong.chee@intel.com> Signed-off-by:
Ley Foon Tan <ley.foon.tan@intel.com>
-
Marek Vasut authored
Disable the OC test on MCVEVK as the old PHY version does not provide this information. This fixes the USB OTG operation. Signed-off-by:
Marek Vasut <marex@denx.de>
-
Marek Vasut authored
Add default DFU altinfo for eMMC. Signed-off-by:
Marek Vasut <marex@denx.de>
-
Marek Vasut authored
There is no point in having such gargantuan buffer, it only requires huge malloc area. Reduce the DFU buffer size. Signed-off-by:
Marek Vasut <marex@denx.de>
-
Marek Vasut authored
The board is now manufactured by Aries Embedded GmbH , rename it. Signed-off-by:
Marek Vasut <marex@denx.de>
-
Chee, Tien Fong authored
Commit ce62e57f ("ARM: boot0 hook: remove macro, include whole header file") miss out cleaning macro in this header file, and this has broken implementation of a boot header capability in socfpga SPL. Remove the macro in this file, and recovering it back to proper functioning. Fixes: ce62e57f ("ARM: boot0 hook: remove macro, include whole header file") Signed-off-by:
Chee, Tien Fong <tien.fong.chee@intel.com>
-
Georges Savoundararadj authored
With the port C enabled, we can read the GPI input state of: * the DIP switches (USER_DIPSW_HPS[3:0]/HPS_GPI[7:4]) * the push buttons (USER_PB_HPS[3:0]/HPS_GPI[11:8]) Signed-off-by:
Georges Savoundararadj <savoundg@gmail.com> Signed-off by: Sid-Ali Teir <git.syedelec@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Marek Vasut <marex@denx.de>
-
Stephen Arnold authored
This patch adds the steps to manually (re)build a Quartus FPGA project, generate the required BSP glue, and update u-boot handoff files for mainline SPL support. Requires Quartus toolchain and current U-Boot. Signed-off-by:
Steve Arnold <stephen.arnold42@gmail.com> Cc: Dinh Nguyen <dinguyen@kernel.org> Cc: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de>
-