- Feb 11, 2021
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Yann Gautier authored
In stm32_get_boot_interface(), there is no need to read the backup register in which the boot interface and instance is saved. It can be saved in a static variable. It will save time if it is used several times. Change-Id: Ida5cbfeb9449d92bdb4f725eb6f6f1c4704282fe Signed-off-by:
Yann Gautier <yann.gautier@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/188319 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Lionel DEBIEVE <lionel.debieve@st.com>
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Lionel Debieve authored
Add a "nofip" suffix to indicate that the current build is not supporting the FIP package. It will be useful for debug purpose. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I96950374ce7010348b246a814b36b871cf5bca44 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/188269 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
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Yann Gautier authored
The base address of UART peripheral should be given in R0, not in R1. Else the console_stm32_core_flush issues an assert messages due to recent changes in console flush functions. Change-Id: Iead01986fdbbf30ad2fd9fa515a1d2b611b4e591 Signed-off-by:
Yann Gautier <yann.gautier@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/187619 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Lionel DEBIEVE <lionel.debieve@st.com>
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Lionel Debieve authored
Align device tree with the last kernel 5.10. Add some compatible changes and pin control modifications. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I03be4704463750227a220b256f386687f0eec058 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/188174 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Nicolas Le Bayon authored
Add read/write functions for BSEC scratch register, used for communication with external agent, and to store boot parameters. Change-Id: If024bcce127c829d8a663df0119f0e908712405e Signed-off-by:
Nicolas Le Bayon <nicolas.le.bayon@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/187860 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Nicolas Le Bayon authored
Checking written value is useless, as local variables. Set function type to void. Change-Id: I5ecad094c2c91a2d5a233addbaba5f76c70eab20 Signed-off-by:
Nicolas Le Bayon <nicolas.le.bayon@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/187859 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Nicolas Le Bayon authored
No more return code check of bsec_write_debug_conf(). This function will be updated as void function. Change-Id: I8ace57faaf911acfa65e402295b6e3605fe81ea9 Signed-off-by:
Nicolas Le Bayon <nicolas.le.bayon@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/187858 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Nicolas Le Bayon authored
Remove unused bsec_read/write_feature_conf() prototypes. Change-Id: I7c99319ada288b93cea6eedf272c09f441249256 Signed-off-by:
Nicolas Le Bayon <nicolas.le.bayon@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/187857 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Ludovic Barre authored
This patch allows to execute bl33 in hypervisor mode if BL33_HYP compilation flag is defined. Change-Id: Icd0de8e9a8180f2ca67952bd6b98f38712e52716 Signed-off-by:
Ludovic Barre <ludovic.barre@st.com> Signed-off-by:
Sebastien Pasdeloup <sebastien.pasdeloup-ext@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/187471 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com> Tested-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
This patch adds changes to support the secure secret provisioning (SSP). Add a specific platform build that constructs a dedicated BL2 image to support the SSP feature. Supported boot mode is limited to serial boot (USB or UART). Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I85de08efd8d4183cd7e1bc0b6f17d247669b82ce Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/185336 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
Rather that a CPU reset, tamper must call the system reset to restart from a clean environment. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I5c5482e4473078283783ad04f202c70b561b27ee Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/186543 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
Enable watchdog secure interrupt to dump registers in case of non secure watchdog. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: Icc9c32125af389df01215687ca915ea67023cda3 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/186542 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
Rework the early interrupt to dump core registers in debug mode. In release mode, it will clear the interrupt and wait watchdog to expire. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I0b690d30f5b52b6fc708fe440b1c15bd3b3f341d Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/186541 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
This function can be used to dump core registers when an issue occurred. It will be automatically called in debug mode and print information. It uses a first core boolean to avoid unexpected dump information on a SGI1 irq request also used for a standard core hotplug. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I264bc6e4206e502a46e41c0820938032535a2058 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/186540 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
Do not build firmware configuration file if no AARCH32_SP is selected. It will avoid build issue when building only bl2 target. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: Ic43e72aff475d0673d9456110f0d3d82fd5c9683 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/186657 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Nicolas TOROMANOFF <nicolas.toromanoff@st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
Add new defines and update the firmware configuration file to use directly that defines. It will allow to directly reflect BL32 size update during build. Change-Id: Ieb11c9e0bac155d26fda9d0f3b086c55d5ce4783 Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/186539 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
Add STM32CubeProgrammer communication update for SSP support. Signed-off-by:
Patrick Delaunay <patrick.delaunay@st.com> Change-Id: I1830bff82d87b3535f0787eb5f47c56960feccaa Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/185335 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Lionel DEBIEVE <lionel.debieve@st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com> Tested-by:
Lionel DEBIEVE <lionel.debieve@st.com>
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Lionel Debieve authored
Add function to find from device tree the proper regulator that controls the VDD domain. Rework the dt_get_cpu_regulator_name to use the same generic function. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I75f96d30a408f6d10182fc780bc40c3971b6095f Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/185334 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
In case of SEPARATE_CODE_AND_RODATA defined, the linker will use the BL2_RO and BL2_RW defined. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: Ie30b4297070b263f78d78074679997da9f37e4d7 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184499 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Nicolas Le Bayon authored
Ordering between read and write transactions should be disabled on each port. The DDR controller ensures that all read/write commands from the application port interface are transported to the DFI interface in the order of appearance. Change-Id: I70c16cfe6c8ae2587d1131c3e7ddf183d20a3bb7 Signed-off-by:
Nicolas Le Bayon <nicolas.le.bayon@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184352 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Lionel DEBIEVE <lionel.debieve@st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com> Tested-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
STM32 board with a FIP image can have same trusted boot as STM32 image. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Signed-off-by:
Nicolas Toromanoff <nicolas.toromanoff@st.com> Change-Id: I2a7c4e4335af17cac7b74b0d6f1c65a74c60b22e Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184839 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
Reserved memory must be filled depending the architecture. This patch automatically detect the address and size length to adapt the address-cells and size-cells values. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I6e159a2f00805fd33a1f1ab76a8c4fd8c17d0c14 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/186503 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Yann Gautier authored
When going to low-power modes, the IO compensation is disabled through the function stm32mp1_syscfg_disable_io_compensation(). But at this step, the SYSCFG clock could be disabled. Enable it at the beginning of the sequence. Change-Id: I9e805cf5ca232f702963925a7d0d7d107dbb874d Signed-off-by:
Yann Gautier <yann.gautier@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/185955 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
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Nicolas Toromanoff authored
Use a more flexible and easier to extend definition of the MAX_PLAT_TABLES value. Signed-off-by:
Nicolas Toromanoff <nicolas.toromanoff@st.com> Change-Id: I677cdfd7b403ad2bd2e8b7f6b0322ad74e81675f Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/185833 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Lionel DEBIEVE <lionel.debieve@st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
Fix MISRA issues and invert the spi_nor_ready status to improve readability. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I25a97fbd6c4389156b4f077b986019fa7c30a457 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/185746 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Christophe KERELLO <christophe.kerello@st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
Invert test logic on the status register control to fix issue when the bit SR_QUAD_EN_MX is not set. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I8b2f140219f124336bf96462abf9d9445d0308bc Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/185745 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Christophe KERELLO <christophe.kerello@st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Yann Gautier authored
Add -Wsign-compare to TF_CFLAGS to check signedness comparison during STM32MP1 platform compilation. Change-Id: I4cada49622f44258d3e0da4560a566de9c7d54b3 Signed-off-by:
Yann Gautier <yann.gautier@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/183876 Reviewed-by:
Lionel DEBIEVE <lionel.debieve@st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com>
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Yann Gautier authored
Add casts where required to avoid compialtion error when enabling Wsign-compare. Change-Id: Ie4c9c0c935d39ff9a2165b909172aacb3e94ab4d Signed-off-by:
Yann Gautier <yann.gautier@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/183875 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Lionel DEBIEVE <lionel.debieve@st.com>
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Yann Gautier authored
Avoid compilation errors: "comparison of integer expressions of different signedness" by changing type of num to uint32_t. And force cast where required. Change-Id: I891e4a288a964ffdb52129813ba8652c5bcf85b2 Signed-off-by:
Yann Gautier <yann.gautier@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/183871 Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Lionel DEBIEVE <lionel.debieve@st.com>
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Gabriel Fernandez authored
Implement dedicated platform function plat_scmi_clock_set_rate(), to override the weak defined function. Change-Id: I651e3060588196baa52cf8d80f1ad9af528cf142 Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/185719 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com> Tested-by:
Yann GAUTIER <yann.gautier@st.com>
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Gabriel Fernandez authored
Remove rate description by arrays as Linux kernel does not properly handle rate arrays. Change-Id: I1ee37b8f5e3f10a03dee9f2ed3c699777840e3e9 Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/185718 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com> Tested-by:
Yann GAUTIER <yann.gautier@st.com>
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Gabriel Fernandez authored
All clocks are exposed as single rate clocks. Concerning MPU clock, only CPU OPP can act and only valid rates are expected for this very clock. Change-Id: I2f76135996da23dae590aa9d77e3bfd6c03a68c1 Signed-off-by:
Gabriel Fernandez <gabriel.fernandez@st.com> Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/185717 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com> Tested-by:
Yann GAUTIER <yann.gautier@st.com>
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Nicolas Toromanoff authored
A platform specific mebedtls_config.h can now be defined if needed by the parent makefile. Signed-off-by:
Nicolas Toromanoff <nicolas.toromanoff@st.com> Change-Id: I532284a72d27424cc801874d7cd0caffe90f2011 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184838 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Lionel DEBIEVE <lionel.debieve@st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com> Tested-by:
Lionel DEBIEVE <lionel.debieve@st.com>
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Nicolas Toromanoff authored
Public key brainpool ecdsa DER certificate are 92 byte long: OID for brainpool curve are 1 byte bigger than the one for NIST curve. Signed-off-by:
Nicolas Toromanoff <nicolas.toromanoff@st.com> Change-Id: Ifad51da3c576d555da9fc519d2df3d9a0e6ed91b Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184837 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Lionel DEBIEVE <lionel.debieve@st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com> Tested-by:
Lionel DEBIEVE <lionel.debieve@st.com>
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Nicolas Toromanoff authored
with platform format PK In some platform the digest of the public key saved in the OTP is not the the digest of the exact same public key buffer needed to check the signature. Typically, check signature may need a BER encapsulated public key, but the hash saved in OTP may be the hash of the plain public key. Add a new platform weak function to transform the public key buffer used by verify_signature to a buffer which hash is saved in OTP. Signed-off-by:
Nicolas Toromanoff <nicolas.toromanoff@st.com> Change-Id: I71017b41e3eca9398cededf317ad97e9b511be5f Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184836 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Nicolas Toromanoff authored
Updated cert_tool to be able to select brainpool P256t1 or NIST prim256v1 curve for certificates signature. Signed-off-by:
Nicolas Toromanoff <nicolas.toromanoff@st.com> Change-Id: I6e800144697069ea83660053b8ba6e21c229243a Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184835 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Nicolas Toromanoff authored
Invert position of BL32 and BL32_DT in memory, otherwise the BL32 BSS initialization overwrote DT area. With this inversion BL32 BSS overwrite a no more used memory area. Signed-off-by:
Nicolas Toromanoff <nicolas.toromanoff@st.com> Change-Id: I0a8cd0c64921d2813be4b31212510f53caea9158 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184834 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
Add the trusted boot firmware configuration information into the BL2 device tree. It enabled the authentication. MBEDTLS heap is not defined, it will use the hard coded one. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Signed-off-by:
Nicolas Toromanoff <nicolas.toromanoff@st.com> Change-Id: I47181d179b814dc512dc527ae54a5a19a126f1c5 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184833 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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Lionel Debieve authored
Move the fw_config authentication structure into the common part. Without BL1, the fw_config will be added into the BL2 firmware. It will be loaded from FIP and authenticated in BL2. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I3b8f8e99961d28d3d15a6dbff06b0d9cdda20881 Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184832 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
Nicolas TOROMANOFF <nicolas.toromanoff@st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com> Tested-by:
Nicolas TOROMANOFF <nicolas.toromanoff@st.com>
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Lionel Debieve authored
Call the stm32mp_system_reset from the driver for the PSCI ops. Signed-off-by:
Lionel Debieve <lionel.debieve@st.com> Change-Id: I0968d7b71138635e16dc95ed2692ff78830f095c Reviewed-on: https://gerrit.st.com/c/mpu/oe/st/tf-a/+/184413 Reviewed-by:
CITOOLS <smet-aci-reviews@lists.codex.cro.st.com> Reviewed-by:
CIBUILD <smet-aci-builds@lists.codex.cro.st.com> Reviewed-by:
Yann GAUTIER <yann.gautier@st.com>
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